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00036 #ifndef AR_INTERNAL_H
00037 #define AR_INTERNAL_H
00038
00039 #include "arith.h"
00040
00041 #include <limits.h>
00042
00043
00044
00045
00046
00047
00048
00049 #if UINT_MAX < 0177777
00050 # error The size of an int must be at least 16 bits.
00051 #endif
00052
00053 #if ULONG_MAX < 017777777777
00054 # error The size of a long must be at least 32 bits.
00055 #endif
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00084
00085 #define AR_CLASS(type) (type & 0x1c0)
00086
00087
00088
00089
00090 typedef struct {
00091 unsigned int part1: 16;
00092 unsigned int part2: 16;
00093 unsigned int part3: 16;
00094 unsigned int part4: 8;
00095 unsigned int part5: 8;
00096 } AR_INT_8_64;
00097
00098 typedef struct {
00099 unsigned int part1: 16;
00100 unsigned int part2: 16;
00101 unsigned int part3: 16;
00102 unsigned int part4: 16;
00103 } AR_INT_64;
00104
00105 typedef struct {
00106 unsigned int part1: 16;
00107 unsigned int part2: 16;
00108 unsigned int part3: 16;
00109 unsigned int part4: 16;
00110 unsigned int part5: 16;
00111 unsigned int part6: 16;
00112 unsigned int part7: 16;
00113 unsigned int part8: 16;
00114 } AR_INT_128;
00115
00116 #define AR_INT_SIZE(type) (type & 0x3c)
00117
00118 #define AR_POINTER_FORMAT(type) (type & 0x3c)
00119
00120 #define AR_POINTER_SIZE(type) (type & 0x3)
00121
00122 #define AR_SIGNEDNESS(type) (type & 0x1)
00123
00124
00125
00126
00127 #define AR_FLOAT_FORMAT(type) (type & 0x20)
00128
00129 #define AR_FLOAT_ROUND(type) (type & 0x18)
00130
00131 #define AR_FLOAT_SIZE(type) (type & 0x6)
00132
00133 #define AR_FLOAT_IS_COMPLEX(type) (type & 0x1)
00134
00135
00136
00137
00138 #define AR_IEEE32_ZERO_BITS 32
00139 #define AR_IEEE32_EXPO_BITS 8
00140 #define AR_IEEE32_C0_BITS 7
00141 #define AR_IEEE32_C1_BITS 16
00142
00143 #define AR_IEEE64_EXPO_BITS 11
00144 #define AR_IEEE64_C0_BITS 4
00145 #define AR_IEEE64_C1_BITS 16
00146 #define AR_IEEE64_C2_BITS 16
00147 #define AR_IEEE64_C3_BITS 16
00148
00149 #define AR_IEEE128_EXPO_BITS 15
00150 #define AR_IEEE128_C0_BITS 16
00151 #define AR_IEEE128_C1_BITS 16
00152 #define AR_IEEE128_C2_BITS 16
00153 #define AR_IEEE128_C3_BITS 16
00154 #define AR_IEEE128_C4_BITS 16
00155 #define AR_IEEE128_C5_BITS 16
00156 #define AR_IEEE128_C6_BITS 16
00157
00158 #define AR_IEEE32_MIN_EXPO 0000
00159 #define AR_IEEE32_EXPO_BIAS 0177
00160 #define AR_IEEE32_MAX_EXPO 0376
00161 #define AR_IEEE32_COEFF_BITS 23
00162
00163 #define AR_IEEE64_MIN_EXPO 00000
00164 #define AR_IEEE64_EXPO_BIAS 01777
00165 #define AR_IEEE64_MAX_EXPO 03776
00166 #define AR_IEEE64_COEFF_BITS 52
00167
00168 #define AR_IEEE128_MIN_EXPO 000000
00169 #define AR_IEEE128_EXPO_BIAS 037777
00170 #define AR_IEEE128_MAX_EXPO 077776
00171 #define AR_IEEE128_COEFF_BITS 112
00172
00173 #define AR_IEEE32_ROUND_BITS 3
00174 #define AR_IEEE64_ROUND_BITS 3
00175 #define AR_IEEE128_ROUND_BITS 3
00176
00177 #define AR_MIPS128_MIN_EXPO AR_IEEE64_MIN_EXPO
00178 #define AR_MIPS128_MAX_EXPO AR_IEEE64_MAX_EXPO
00179 #define AR_MIPS128_EXPO_BIAS AR_IEEE64_EXPO_BIAS
00180
00181 typedef struct {
00182 unsigned int zero : AR_IEEE32_ZERO_BITS;
00183 unsigned int sign : 1;
00184 unsigned int expo : AR_IEEE32_EXPO_BITS;
00185 unsigned int coeff0 : AR_IEEE32_C0_BITS;
00186 unsigned int coeff1 : AR_IEEE32_C1_BITS;
00187 } AR_IEEE_32;
00188
00189 typedef struct {
00190 unsigned int sign : 1;
00191 unsigned int expo : AR_IEEE64_EXPO_BITS;
00192 unsigned int coeff0 : AR_IEEE64_C0_BITS;
00193 unsigned int coeff1 : AR_IEEE64_C1_BITS;
00194 unsigned int coeff2 : AR_IEEE64_C2_BITS;
00195 unsigned int coeff3 : AR_IEEE64_C3_BITS;
00196 } AR_IEEE_64;
00197
00198 typedef struct {
00199 unsigned int sign : 1;
00200 unsigned int expo : AR_IEEE128_EXPO_BITS;
00201 unsigned int coeff0 : AR_IEEE128_C0_BITS;
00202 unsigned int coeff1 : AR_IEEE128_C1_BITS;
00203 unsigned int coeff2 : AR_IEEE128_C2_BITS;
00204 unsigned int coeff3 : AR_IEEE128_C3_BITS;
00205 unsigned int coeff4 : AR_IEEE128_C4_BITS;
00206 unsigned int coeff5 : AR_IEEE128_C5_BITS;
00207 unsigned int coeff6 : AR_IEEE128_C6_BITS;
00208 } AR_IEEE_128;
00209
00210 typedef struct {
00211 unsigned int sign : 1;
00212 unsigned int expo : AR_IEEE64_EXPO_BITS;
00213 unsigned int coeff0 : AR_IEEE64_C0_BITS;
00214 unsigned int coeff1 : AR_IEEE64_C1_BITS;
00215 unsigned int coeff2 : AR_IEEE64_C2_BITS;
00216 unsigned int coeff3 : AR_IEEE64_C3_BITS;
00217 unsigned int signl : 1;
00218 unsigned int expol : AR_IEEE64_EXPO_BITS;
00219 unsigned int coeff0l : AR_IEEE64_C0_BITS;
00220 unsigned int coeff1l : AR_IEEE64_C1_BITS;
00221 unsigned int coeff2l : AR_IEEE64_C2_BITS;
00222 unsigned int coeff3l : AR_IEEE64_C3_BITS;
00223 } AR_MIPS_128;
00224
00225 typedef struct {
00226 unsigned int rsign : 1;
00227 unsigned int rexpo : AR_IEEE32_EXPO_BITS;
00228 unsigned int rcoeff0 : AR_IEEE32_C0_BITS;
00229 unsigned int rcoeff1 : AR_IEEE32_C1_BITS;
00230 unsigned int isign : 1;
00231 unsigned int iexpo : AR_IEEE32_EXPO_BITS;
00232 unsigned int icoeff0 : AR_IEEE32_C0_BITS;
00233 unsigned int icoeff1 : AR_IEEE32_C1_BITS;
00234 } AR_CPLX_IEEE_32;
00235
00236 typedef struct {
00237 AR_IEEE_64 real;
00238 AR_IEEE_64 imag;
00239 } AR_CPLX_IEEE_64;
00240
00241 typedef struct {
00242 AR_IEEE_128 real;
00243 AR_IEEE_128 imag;
00244 } AR_CPLX_IEEE_128;
00245
00246 typedef struct {
00247 AR_MIPS_128 real;
00248 AR_MIPS_128 imag;
00249 } AR_CPLX_MIPS_128;
00250
00251
00252
00253
00254 #define AR_CRAY_EXPO_BITS 15
00255 #define AR_CRAY_C0_BITS 16
00256 #define AR_CRAY_C1_BITS 16
00257 #define AR_CRAY_C2_BITS 16
00258 #define AR_CRAY_ZERO_BITS 16
00259 #define AR_CRAY_C3_BITS 16
00260 #define AR_CRAY_C4_BITS 16
00261 #define AR_CRAY_C5_BITS 16
00262
00263 #define AR_CRAY_MIN_EXPO 020000
00264 #define AR_CRAY_EXPO_BIAS 040001
00265 #define AR_CRAY_MAX_EXPO 057777
00266 #define AR_CRAY64_COEFF_BITS 48
00267 #define AR_CRAY128_COEFF_BITS 96
00268
00269 typedef struct {
00270 unsigned int sign : 1;
00271 unsigned int expo : AR_CRAY_EXPO_BITS;
00272 unsigned int coeff0 : AR_CRAY_C0_BITS;
00273 unsigned int coeff1 : AR_CRAY_C1_BITS;
00274 unsigned int coeff2 : AR_CRAY_C2_BITS;
00275 } AR_CRAY_64;
00276
00277 typedef struct {
00278 unsigned int sign : 1;
00279 unsigned int expo : AR_CRAY_EXPO_BITS;
00280 unsigned int coeff0 : AR_CRAY_C0_BITS;
00281 unsigned int coeff1 : AR_CRAY_C1_BITS;
00282 unsigned int coeff2 : AR_CRAY_C2_BITS;
00283 unsigned int zero : AR_CRAY_ZERO_BITS;
00284 unsigned int coeff3 : AR_CRAY_C3_BITS;
00285 unsigned int coeff4 : AR_CRAY_C4_BITS;
00286 unsigned int coeff5 : AR_CRAY_C5_BITS;
00287 } AR_CRAY_128;
00288
00289 typedef struct {
00290 AR_CRAY_64 real;
00291 AR_CRAY_64 imag;
00292 } AR_CPLX_CRAY_64;
00293
00294 typedef struct {
00295 AR_CRAY_128 real;
00296 AR_CRAY_128 imag;
00297 } AR_CPLX_CRAY_128;
00298
00299
00300
00301
00302 typedef union {
00303 AR_INT_64 ar_i64;
00304 AR_INT_8_64 ar_i8;
00305 AR_INT_128 ar_i128;
00306 AR_CRAY_64 ar_f64;
00307 AR_CRAY_128 ar_f128;
00308 AR_IEEE_32 ar_ieee32;
00309 AR_IEEE_64 ar_ieee64;
00310 AR_IEEE_128 ar_ieee128;
00311 AR_MIPS_128 ar_mips128;
00312 AR_CPLX_CRAY_64 ar_cplx_f64;
00313 AR_CPLX_CRAY_128 ar_cplx_f128;
00314 AR_CPLX_IEEE_32 ar_cplx_ieee32;
00315 AR_CPLX_IEEE_64 ar_cplx_ieee64;
00316 AR_CPLX_IEEE_128 ar_cplx_ieee128;
00317 AR_CPLX_MIPS_128 ar_cplx_mips128;
00318 } ar_data;
00319
00320
00321
00322
00323 typedef struct {
00324 unsigned int ar_high_mode_bits1 : 16;
00325 unsigned int ar_high_mode_bits2 : 16;
00326 unsigned int ar_unused_mode_bits: 19;
00327 unsigned int ar_truncate_bits : 6;
00328 unsigned int ar_128bit_format : 1;
00329 unsigned int ar_denorms_trap : 1;
00330 unsigned int ar_underflow_mode : 2;
00331 unsigned int ar_rounding_mode : 2;
00332 unsigned int ar_float_format : 1;
00333 } ar_state_info;
00334
00335 extern ar_state_info ar_state_register;
00336
00337 extern int ar_simulate;
00338 extern int ar_rounding_modes;
00339 extern int ar_underflow_modes;
00340
00341
00342
00343
00344 #define MASKL(bits) ((unsigned long) \
00345 (~((~(unsigned long) 0) >> (bits))))
00346 #define MASKR(bits) ((unsigned long) \
00347 (~((~(unsigned long) 0) << (bits))))
00348 #define MASKM(bits,where) ((unsigned long) (MASKR(bits) << (where)))
00349
00350
00351
00352
00353
00354 enum message_types {
00355 Comment, Note, Caution, Warning,
00356 Error, Internal, Vector_Info, Scalar_Info,
00357 Table, Ansi, Logfile_Warning, Inline_Info,
00358 Info, Tasking_Info, Limit, Logfile_Error,
00359 Logfile_Summary, F77_ANSI, Unknown};
00360
00361
00362
00363
00364
00365
00366 int ar_add_integer(ar_data *,
00367 const AR_TYPE *,
00368 const ar_data *,
00369 const AR_TYPE *,
00370 const ar_data *,
00371 const AR_TYPE *);
00372
00373 void ar_dblshift(ar_data *,
00374 const AR_TYPE *resulttype,
00375 const ar_data *,
00376 const ar_data *,
00377 int);
00378
00379 int ar_divide_integer(ar_data *,
00380 const AR_TYPE *,
00381 ar_data *,
00382 const AR_TYPE *,
00383 const ar_data *,
00384 const AR_TYPE *,
00385 const ar_data *,
00386 const AR_TYPE *);
00387
00388 int ar_negate_integer(ar_data *,
00389 const AR_TYPE *,
00390 const ar_data *,
00391 const AR_TYPE *);
00392
00393 int ar_multiply_integer(ar_data *,
00394 const AR_TYPE *,
00395 const ar_data *,
00396 const AR_TYPE *,
00397 const ar_data *,
00398 const AR_TYPE *);
00399
00400 int ar_subtract_integer(ar_data *,
00401 const AR_TYPE *,
00402 int *,
00403 const ar_data *,
00404 const AR_TYPE *,
00405 const ar_data *,
00406 const AR_TYPE *);
00407
00408
00409
00410 int ar_i32norm (signed int,
00411 unsigned long,
00412 unsigned long,
00413 AR_IEEE_32 *,
00414 int);
00415
00416 int ar_i64norm (signed int,
00417 unsigned long,
00418 unsigned long,
00419 AR_IEEE_64 *,
00420 int);
00421
00422 int ar_i128norm(signed int,
00423 unsigned long,
00424 unsigned long,
00425 AR_IEEE_128 *,
00426 int);
00427
00428 int ar_i32to64 (AR_IEEE_64 *,
00429 const AR_IEEE_32 *);
00430
00431 int ar_i64to32 (AR_IEEE_32 *,
00432 const AR_IEEE_64 *,
00433 const int);
00434
00435 int ar_i64to128(AR_IEEE_128 *,
00436 const AR_IEEE_64 *);
00437
00438 int ar_i128to64(AR_IEEE_64 *,
00439 const AR_IEEE_128 *,
00440 const int);
00441
00442 int ar_ifadd32 (AR_IEEE_32 *,
00443 const AR_IEEE_32 *,
00444 const AR_IEEE_32 *,
00445 int);
00446
00447 int ar_ifadd64 (AR_IEEE_64 *,
00448 const AR_IEEE_64 *,
00449 const AR_IEEE_64 *,
00450 int);
00451
00452 int ar_ifadd128(AR_IEEE_128 *,
00453 const AR_IEEE_128 *,
00454 const AR_IEEE_128 *,
00455 int);
00456
00457 int ar_ifdiv32 (AR_IEEE_32 *,
00458 const AR_IEEE_32 *,
00459 const AR_IEEE_32 *,
00460 int);
00461
00462 int ar_ifdiv64 (AR_IEEE_64 *,
00463 const AR_IEEE_64 *,
00464 const AR_IEEE_64 *,
00465 int);
00466
00467 int ar_ifdiv128(AR_IEEE_128 *,
00468 const AR_IEEE_128 *,
00469 const AR_IEEE_128 *,
00470 int);
00471
00472 int ar_ifix32 (AR_INT_64 *,
00473 const AR_IEEE_32 *,
00474 int,
00475 int);
00476
00477 int ar_ifix64 (AR_INT_64 *,
00478 const AR_IEEE_64 *,
00479 int,
00480 int);
00481
00482 int ar_ifix128 (AR_INT_64 *,
00483 const AR_IEEE_128 *,
00484 int,
00485 int);
00486
00487 int ar_iflt32 (AR_IEEE_32 *,
00488 const AR_INT_64 *,
00489 int,
00490 int);
00491
00492 int ar_iflt64 (AR_IEEE_64 *,
00493 const AR_INT_64 *,
00494 int,
00495 int);
00496
00497 int ar_iflt128 (AR_IEEE_128 *,
00498 const AR_INT_64 *,
00499 int,
00500 int);
00501
00502 int ar_ifmul32 (AR_IEEE_32 *,
00503 const AR_IEEE_32 *,
00504 const AR_IEEE_32 *,
00505 int);
00506
00507 int ar_ifmul64 (AR_IEEE_64 *,
00508 const AR_IEEE_64 *,
00509 const AR_IEEE_64 *,
00510 int);
00511
00512 int ar_ifmul128(AR_IEEE_128 *,
00513 const AR_IEEE_128 *,
00514 const AR_IEEE_128 *,
00515 int);
00516
00517 int ar_ifsub32 (AR_IEEE_32 *,
00518 const AR_IEEE_32 *,
00519 const AR_IEEE_32 *,
00520 int);
00521
00522 int ar_ifsub64 (AR_IEEE_64 *,
00523 const AR_IEEE_64 *,
00524 const AR_IEEE_64 *,
00525 int);
00526
00527 int ar_ifsub128(AR_IEEE_128 *,
00528 const AR_IEEE_128 *,
00529 const AR_IEEE_128 *,
00530 int);
00531
00532 int ar_isqrt64 (AR_IEEE_64 *,
00533 const AR_IEEE_64 *,
00534 int);
00535
00536
00537
00538 int ar_c64to128(AR_CRAY_128 *,
00539 const AR_CRAY_64 *);
00540
00541 int ar_c128to64(AR_CRAY_64 *,
00542 const AR_CRAY_128 *);
00543
00544 int ar_c1frecip(AR_CRAY_64 *,
00545 const AR_CRAY_64 *);
00546
00547 int ar_cfadd64 (AR_CRAY_64 *,
00548 const AR_CRAY_64 *,
00549 const AR_CRAY_64 *);
00550
00551 int ar_cfadd128(AR_CRAY_128 *,
00552 const AR_CRAY_128 *,
00553 const AR_CRAY_128 *);
00554
00555 int ar_cfdiv64 (AR_CRAY_64 *,
00556 const AR_CRAY_64 *,
00557 const AR_CRAY_64 *,
00558 int);
00559
00560 int ar_cfdiv128(AR_CRAY_128 *,
00561 const AR_CRAY_128 *,
00562 const AR_CRAY_128 *,
00563 int);
00564
00565 int ar_cfix64 (AR_INT_64 *,
00566 const AR_CRAY_64 *,
00567 int);
00568
00569 int ar_cfix128 (AR_INT_64 *,
00570 const AR_CRAY_128 *,
00571 int);
00572
00573 int ar_cflt64 (AR_CRAY_64 *,
00574 const AR_INT_64 *,
00575 int);
00576
00577 int ar_cflt128 (AR_CRAY_128 *,
00578 const AR_INT_64 *,
00579 int);
00580
00581 int ar_cfmul64 (AR_CRAY_64 *,
00582 const AR_CRAY_64 *,
00583 const AR_CRAY_64 *,
00584 int);
00585
00586 int ar_cfmul128(AR_CRAY_128 *,
00587 const AR_CRAY_128 *,
00588 const AR_CRAY_128 *,
00589 int);
00590
00591 int ar_crnd64 (AR_CRAY_64 *,
00592 const AR_CRAY_64 *);
00593
00594 int ar_crnd128 (AR_CRAY_128 *,
00595 const AR_CRAY_128 *);
00596
00597 int ar_cfsub64 (AR_CRAY_64 *,
00598 const AR_CRAY_64 *,
00599 const AR_CRAY_64 *);
00600
00601 int ar_cfsub128(AR_CRAY_128 *,
00602 const AR_CRAY_128 *,
00603 const AR_CRAY_128 *);
00604
00605 void ar_CRAY_64_trunc(AR_CRAY_64 *opnd);
00606
00607
00608
00609 int ar_convert_to_integral(ar_data *,
00610 const AR_TYPE *,
00611 const ar_data *,
00612 const AR_TYPE *);
00613
00614 int ar_compose_complex(ar_data *,
00615 AR_TYPE *,
00616 const ar_data *,
00617 const ar_data *,
00618 const AR_TYPE *);
00619
00620 int ar_decompose_complex(ar_data *,
00621 ar_data *,
00622 AR_TYPE *,
00623 const ar_data *,
00624 const AR_TYPE *);
00625
00626 int ar_negate_float(ar_data *,
00627 const AR_TYPE *,
00628 const ar_data *,
00629 const AR_TYPE *);
00630
00631
00632
00633 int ar_c128toi64(AR_IEEE_64 *,
00634 const AR_CRAY_128 *);
00635
00636 int ar_i64toc128(AR_CRAY_128 *,
00637 const AR_IEEE_64 *);
00638
00639 int ar_ctoi64 (AR_IEEE_64 *,
00640 const AR_CRAY_64 *);
00641
00642 int ar_ctoi128 (AR_IEEE_128 *,
00643 const AR_CRAY_128 *);
00644
00645 int ar_itoc64 (AR_CRAY_64 *,
00646 const AR_IEEE_64 *,
00647 int);
00648
00649 int ar_itoc128 (AR_CRAY_128 *,
00650 const AR_IEEE_128 *,
00651 int);
00652
00653 #ifdef __mips
00654
00655
00656 int ar_m128toi128(AR_IEEE_128 *out, long double *in);
00657
00658 int ar_i128tom128(long double *out, AR_IEEE_128 *in);
00659
00660 #endif
00661
00662
00663
00664 void ar_internal_error(int msgnum,
00665 char *file,
00666 int line);
00667
00668 void ar_set_invalid_result(ar_data *result,
00669 const AR_TYPE *resulttype);
00670
00671 extern void ar_clear_unused_bits (ar_data *opnd,
00672 const AR_TYPE *opndtype);
00673
00674 extern void PRINTMSG(int pseudo_line_num,
00675 int msg_number,
00676 enum message_types msg_severity,
00677 int column_num,
00678 ...);
00679
00680
00681
00682
00683 typedef enum {
00684 AR_Arch_Unknown,
00685 AR_Arch_PVP,
00686 AR_Arch_PVP_IEEE,
00687 AR_Arch_T3D,
00688 AR_Arch_T3E,
00689 AR_Arch_SPARC,
00690 AR_Arch_MIPS
00691 } AR_ARCHITECTURE;
00692
00693 extern AR_ARCHITECTURE ar_host(void);
00694
00695 #define HOST_IS_UNKNOWN (ar_host() == AR_Arch_Unknown )
00696 #define HOST_IS_PVP (ar_host() == AR_Arch_PVP )
00697 #define HOST_IS_PVP_IEEE (ar_host() == AR_Arch_PVP_IEEE)
00698 #define HOST_IS_T3D (ar_host() == AR_Arch_T3D )
00699 #define HOST_IS_T3E (ar_host() == AR_Arch_T3E )
00700 #define HOST_IS_SPARC (ar_host() == AR_Arch_SPARC )
00701 #define HOST_IS_MIPS (ar_host() == AR_Arch_MIPS )
00702
00703 #define HOST_IS_MPP (HOST_IS_T3D || HOST_IS_T3E)
00704
00705 #define HOST_IS_CRAY_FLOAT (HOST_IS_PVP)
00706 #define HOST_IS_IEEE_FLOAT (HOST_IS_PVP_IEEE || \
00707 HOST_IS_MPP || \
00708 HOST_IS_SPARC || \
00709 HOST_IS_MIPS)
00710
00711
00712
00713
00714
00715
00716
00717
00718
00719 #define _Solaris 0
00720
00721 #define ROUND_MODE(t) ((t >> 3) & 3)
00722 #define UNROUNDED_TYPE(t) (t &~ 0x18)
00723
00724 #define IS_ERROR_STATUS(s) (((s) & AR_ERROR_STATUS) != 0)
00725
00726
00727 #define INT_OVERFLOWS_46_BITS(OPND) \
00728 ((((OPND).ar_i64.part1 & 0xffff) != 0xffff || \
00729 ((OPND).ar_i64.part2 & 0xe000) != 0xe000) && \
00730 (((OPND).ar_i64.part1 & 0xffff) != 0 || \
00731 ((OPND).ar_i64.part2 & 0xe000) != 0))
00732
00733
00734
00735
00736 #define IS_INT8_ZERO(i) \
00737 ((i)->ar_i8.part5 == 0)
00738 #define IS_INT16_ZERO(i) \
00739 ((i)->ar_i64.part4 == 0)
00740 #define IS_INT24_ZERO(i) \
00741 (((i)->ar_i64.part3 & 0xFF) == 0 && \
00742 (i)->ar_i64.part4 == 0)
00743 #define IS_INT32_ZERO(i) \
00744 ((i)->ar_i64.part3 == 0 && \
00745 (i)->ar_i64.part4 == 0)
00746 #define IS_INT46_ZERO(i) \
00747 (((i)->ar_i64.part2 & 0x3FFF) == 0 && \
00748 (i)->ar_i64.part3 == 0 && \
00749 (i)->ar_i64.part4 == 0)
00750 #define IS_INT64_ZERO(i) \
00751 ((i)->ar_i64.part1 == 0 && \
00752 (i)->ar_i64.part2 == 0 && \
00753 (i)->ar_i64.part3 == 0 && \
00754 (i)->ar_i64.part4 == 0)
00755 #define IS_INT128_ZERO(i) \
00756 ((i)->ar_i128.part1 == 0 && \
00757 (i)->ar_i128.part2 == 0 && \
00758 (i)->ar_i128.part3 == 0 && \
00759 (i)->ar_i128.part4 == 0 && \
00760 (i)->ar_i128.part5 == 0 && \
00761 (i)->ar_i128.part6 == 0 && \
00762 (i)->ar_i128.part7 == 0 && \
00763 (i)->ar_i128.part8 == 0)
00764
00765 #define IS_INT8_UPPER_ZERO(i) \
00766 ((i)->ar_i8.part1 == 0 && \
00767 (i)->ar_i8.part2 == 0 && \
00768 (i)->ar_i8.part3 == 0 && \
00769 (i)->ar_i8.part4 == 0)
00770 #define IS_INT16_UPPER_ZERO(i) \
00771 ((i)->ar_i64.part1 == 0 && \
00772 (i)->ar_i64.part2 == 0 && \
00773 (i)->ar_i64.part3 == 0)
00774 #define IS_INT24_UPPER_ZERO(i) \
00775 ((i)->ar_i64.part1 == 0 && \
00776 (i)->ar_i64.part2 == 0 && \
00777 ((i)->ar_i64.part3 & 0xFF00) == 0)
00778 #define IS_INT32_UPPER_ZERO(i) \
00779 ((i)->ar_i64.part1 == 0 && \
00780 (i)->ar_i64.part2 == 0)
00781 #define IS_INT46_UPPER_ZERO(i) \
00782 ((i)->ar_i64.part1 == 0 && \
00783 ((i)->ar_i64.part2 & 0xC000) == 0)
00784
00785 #define ZERO_INT8(i) \
00786 (i)->ar_i8.part5 = 0
00787 #define ZERO_INT16(i) \
00788 (i)->ar_i64.part4 = 0
00789 #define ZERO_INT24(i) \
00790 do { \
00791 (i)->ar_i64.part3 &= 0xFF00; \
00792 (i)->ar_i64.part4 = 0; \
00793 } while(0)
00794 #define ZERO_INT32(i) \
00795 (i)->ar_i64.part3 = \
00796 (i)->ar_i64.part4 = 0
00797 #define ZERO_INT64(i) \
00798 (i)->ar_i64.part1 = \
00799 (i)->ar_i64.part2 = \
00800 (i)->ar_i64.part3 = \
00801 (i)->ar_i64.part4 = 0
00802 #define ZERO_INT128(i) \
00803 (i)->ar_i128.part1 = \
00804 (i)->ar_i128.part2 = \
00805 (i)->ar_i128.part3 = \
00806 (i)->ar_i128.part4 = \
00807 (i)->ar_i128.part5 = \
00808 (i)->ar_i128.part6 = \
00809 (i)->ar_i128.part7 = \
00810 (i)->ar_i128.part8 = 0
00811
00812 #define ZERO_INT8_UPPER(i) \
00813 (i)->ar_i8.part1 = \
00814 (i)->ar_i8.part2 = \
00815 (i)->ar_i8.part3 = \
00816 (i)->ar_i8.part4 = 0
00817 #define ZERO_INT16_UPPER(i) \
00818 (i)->ar_i64.part1 = \
00819 (i)->ar_i64.part2 = \
00820 (i)->ar_i64.part3 = 0
00821 #define ZERO_INT24_UPPER(i) \
00822 do { \
00823 (i)->ar_i64.part1 = \
00824 (i)->ar_i64.part2 = 0; \
00825 (i)->ar_i64.part3 &= 0xFF; \
00826 } while(0)
00827 #define ZERO_INT32_UPPER(i) \
00828 (i)->ar_i64.part1 = \
00829 (i)->ar_i64.part2 = 0
00830
00831 #define ZERO_INT8_ALL(i) \
00832 (i)->ar_i8.part1 = \
00833 (i)->ar_i8.part2 = \
00834 (i)->ar_i8.part3 = \
00835 (i)->ar_i8.part4 = \
00836 (i)->ar_i8.part5 = 0
00837 #define ZERO_INT16_ALL(i) \
00838 (i)->ar_i64.part1 = \
00839 (i)->ar_i64.part2 = \
00840 (i)->ar_i64.part3 = \
00841 (i)->ar_i64.part4 = 0
00842 #define ZERO_INT24_ALL(i) \
00843 ZERO_INT16_ALL(i)
00844 #define ZERO_INT32_ALL(i) \
00845 ZERO_INT16_ALL(i)
00846 #define ZERO_INT64_ALL(i) \
00847 ZERO_INT16_ALL(i)
00848 #define ZERO_INT128_ALL(i) \
00849 (i)->ar_i128.part1 = \
00850 (i)->ar_i128.part2 = \
00851 (i)->ar_i128.part3 = \
00852 (i)->ar_i128.part4 = \
00853 (i)->ar_i128.part5 = \
00854 (i)->ar_i128.part6 = \
00855 (i)->ar_i128.part7 = \
00856 (i)->ar_i128.part8 = 0
00857
00858 #define IS_INT8_UPPER_ONES(i) \
00859 ((i)->ar_i8.part1 == 0xFFFF && \
00860 (i)->ar_i8.part2 == 0xFFFF && \
00861 (i)->ar_i8.part3 == 0xFFFF && \
00862 (i)->ar_i8.part4 == 0xFF)
00863 #define IS_INT16_UPPER_ONES(i) \
00864 ((i)->ar_i64.part1 == 0xFFFF && \
00865 (i)->ar_i64.part2 == 0xFFFF && \
00866 (i)->ar_i64.part3 == 0xFFFF)
00867 #define IS_INT24_UPPER_ONES(i) \
00868 ((i)->ar_i64.part1 == 0xFFFF && \
00869 (i)->ar_i64.part2 == xxFFFF && \
00870 ((i)->ar_i64.part3 & 0xFF00) == 0xFF00)
00871 #define IS_INT32_UPPER_ONES(i) \
00872 ((i)->ar_i64.part1 == 0xFFFF && \
00873 (i)->ar_i64.part2 == 0xFFFF)
00874 #define IS_INT46_UPPER_ONES(i) \
00875 ((i)->ar_i64.part1 == 0xFFFF && \
00876 ((i)->ar_i64.part2 & 0xC000) == 0xC000)
00877
00878 #define INT8_SIGN(i) \
00879 ((i)->ar_i8.part5 & 0x80 )
00880 #define INT16_SIGN(i) \
00881 ((i)->ar_i64.part4 & 0x8000)
00882 #define INT24_SIGN(i) \
00883 ((i)->ar_i64.part3 & 0x80 )
00884 #define INT32_SIGN(i) \
00885 ((i)->ar_i64.part3 & 0x8000)
00886 #define INT64_SIGN(i) \
00887 ((i)->ar_i64.part1 & 0x8000)
00888 #define INT128_SIGN(i) \
00889 ((i)->ar_i128.part1 & 0x8000)
00890
00891 #define INT_SIGN(t, i) \
00892 ((AR_INT_SIZE(t) == AR_INT_SIZE_8 && \
00893 INT8_SIGN(i)) || \
00894 (AR_INT_SIZE(t) == AR_INT_SIZE_16 && \
00895 INT16_SIGN(i)) || \
00896 (AR_INT_SIZE(t) == AR_INT_SIZE_24 && \
00897 INT24_SIGN(i)) || \
00898 (AR_INT_SIZE(t) == AR_INT_SIZE_32 && \
00899 INT32_SIGN(i)) || \
00900 (AR_INT_SIZE(t) == AR_INT_SIZE_46 && \
00901 INT64_SIGN(i)) || \
00902 (AR_INT_SIZE(t) == AR_INT_SIZE_64 && \
00903 INT64_SIGN(i)) || \
00904 (AR_INT_SIZE(t) == AR_INT_SIZE_128 && \
00905 INT128_SIGN(i)))
00906
00907 #define COPY_INT8(i, j) \
00908 (i)->ar_i8.part5 = (j)->ar_i8.part5
00909 #define COPY_INT16(i, j) \
00910 (i)->ar_i64.part4 = (j)->ar_i64.part4
00911 #define COPY_INT24(i, j) \
00912 do { \
00913 (i)->ar_i64.part3 = (j)->ar_i64.part3 & 0xFF00; \
00914 (i)->ar_i64.part4 = (j)->ar_i64.part4; \
00915 } while(0)
00916 #define COPY_INT32(i, j) \
00917 do { \
00918 (i)->ar_i64.part3 = (j)->ar_i64.part3; \
00919 (i)->ar_i64.part4 = (j)->ar_i64.part4; \
00920 } while(0)
00921 #define COPY_INT46(i, j) \
00922 do { \
00923 (i)->ar_i64.part2 = (j)->ar_i64.part2 & 0x3FFF; \
00924 (i)->ar_i64.part3 = (j)->ar_i64.part3; \
00925 (i)->ar_i64.part4 = (j)->ar_i64.part4; \
00926 } while(0)
00927 #define COPY_INT64(i, j) \
00928 do { \
00929 (i)->ar_i64.part1 = (j)->ar_i64.part1; \
00930 (i)->ar_i64.part2 = (j)->ar_i64.part2; \
00931 (i)->ar_i64.part3 = (j)->ar_i64.part3; \
00932 (i)->ar_i64.part4 = (j)->ar_i64.part4; \
00933 } while(0)
00934 #define COPY_INT128(i, j) \
00935 do { \
00936 (i)->ar_i128.part1 = (j)->ar_i128.part1; \
00937 (i)->ar_i128.part2 = (j)->ar_i128.part2; \
00938 (i)->ar_i128.part3 = (j)->ar_i128.part3; \
00939 (i)->ar_i128.part4 = (j)->ar_i128.part4; \
00940 (i)->ar_i128.part5 = (j)->ar_i128.part5; \
00941 (i)->ar_i128.part6 = (j)->ar_i128.part6; \
00942 (i)->ar_i128.part7 = (j)->ar_i128.part7; \
00943 (i)->ar_i128.part8 = (j)->ar_i128.part8; \
00944 } while(0)
00945
00946 #define INT8_TO_HOST_SINT64(i,a) \
00947 do { \
00948 if (INT8_SIGN(a)) \
00949 i = -(((~((AR_HOST_SINT64) ((a)->ar_i8.part5))) + \
00950 1 \
00951 ) & \
00952 ~(-((AR_HOST_SINT64) 1) << 8) \
00953 ); \
00954 else \
00955 i = (AR_HOST_SINT64) (a)->ar_i8.part5; \
00956 } while (0)
00957 #define INT16_TO_HOST_SINT64(i,a) \
00958 do { \
00959 if (INT16_SIGN(a)) \
00960 i = -(((~((AR_HOST_SINT64) ((a)->ar_i64.part4))) + \
00961 1 \
00962 ) & \
00963 ~(-((AR_HOST_SINT64) 1) << 16) \
00964 ); \
00965 else \
00966 i = (AR_HOST_SINT64) (a)->ar_i64.part4; \
00967 } while (0)
00968 #define INT32_TO_HOST_SINT64(i,a) \
00969 do { \
00970 if (INT32_SIGN(a)) \
00971 i = -(((~((((AR_HOST_SINT64) (a)->ar_i64.part3) << 16) \
00972 | \
00973 (((AR_HOST_SINT64) (a)->ar_i64.part4) ) \
00974 ) \
00975 ) + \
00976 1 \
00977 ) & \
00978 ~(-((AR_HOST_SINT64) 1) << 32) \
00979 ); \
00980 else \
00981 i = (((AR_HOST_SINT64) (a)->ar_i64.part3) << 16) | \
00982 (((AR_HOST_SINT64) (a)->ar_i64.part4) ); \
00983 } while (0)
00984 #define INT64_TO_HOST_SINT64(i,a) \
00985 do { \
00986 i = (((AR_HOST_SINT64) (a)->ar_i64.part1) << 48) | \
00987 (((AR_HOST_SINT64) (a)->ar_i64.part2) << 32) | \
00988 (((AR_HOST_SINT64) (a)->ar_i64.part3) << 16) | \
00989 (((AR_HOST_SINT64) (a)->ar_i64.part4) ); \
00990 } while (0)
00991
00992
00993
00994 #define IS_IEEE32_NZ_COEFF(x) \
00995 ((x)->coeff0 != 0 || \
00996 (x)->coeff1 != 0)
00997
00998 #define IS_IEEE64_NZ_COEFF(x) \
00999 ((x)->coeff0 != 0 || \
01000 (x)->coeff1 != 0 || \
01001 (x)->coeff2 != 0 || \
01002 (x)->coeff3 != 0)
01003
01004 #define IS_IEEE128_NZ_COEFF(x) \
01005 ((x)->coeff0 != 0 || \
01006 (x)->coeff1 != 0 || \
01007 (x)->coeff2 != 0 || \
01008 (x)->coeff3 != 0 || \
01009 (x)->coeff4 != 0 || \
01010 (x)->coeff5 != 0 || \
01011 (x)->coeff6 != 0)
01012
01013 #define IS_MIPS128_NZ_COEFF(x) \
01014 ((x)->coeff0 != 0 || \
01015 (x)->coeff1 != 0 || \
01016 (x)->coeff2 != 0 || \
01017 (x)->coeff3 != 0 || \
01018 (x)->coeff0l != 0 || \
01019 (x)->coeff1l != 0 || \
01020 (x)->coeff2l != 0 || \
01021 (x)->coeff3l != 0 )
01022
01023
01024 #define IS_IEEE32_NaN(x) \
01025 ((x)->expo > AR_IEEE32_MAX_EXPO && IS_IEEE32_NZ_COEFF(x))
01026
01027 #define IS_IEEE64_NaN(x) \
01028 ((x)->expo > AR_IEEE64_MAX_EXPO && IS_IEEE64_NZ_COEFF(x))
01029
01030 #define IS_IEEE128_NaN(x) \
01031 ((x)->expo > AR_IEEE128_MAX_EXPO && IS_IEEE128_NZ_COEFF(x))
01032
01033 #define IS_MIPS128_NaN(x) \
01034 (((x)->expo > AR_MIPS128_MAX_EXPO || \
01035 (x)->expol > AR_MIPS128_MAX_EXPO) && IS_MIPS128_NZ_COEFF(x))
01036
01037
01038 #define ADDIEEE32(sum,carry,a,b) do { \
01039 (sum).coeff1 = (carry) += (a).coeff1 + (b).coeff1; \
01040 (carry) >>= AR_IEEE32_C1_BITS; \
01041 (sum).coeff0 = (carry) += (a).coeff0 + (b).coeff0; \
01042 (carry) >>= AR_IEEE32_C0_BITS; \
01043 } while (0)
01044
01045 #define ADDIEEE64(sum,carry,a,b) do { \
01046 (sum).coeff3 = (carry) += (a).coeff3 + (b).coeff3; \
01047 (carry) >>= AR_IEEE64_C3_BITS; \
01048 (sum).coeff2 = (carry) += (a).coeff2 + (b).coeff2; \
01049 (carry) >>= AR_IEEE64_C2_BITS; \
01050 (sum).coeff1 = (carry) += (a).coeff1 + (b).coeff1; \
01051 (carry) >>= AR_IEEE64_C1_BITS; \
01052 (sum).coeff0 = (carry) += (a).coeff0 + (b).coeff0; \
01053 (carry) >>= AR_IEEE64_C0_BITS; \
01054 } while (0)
01055
01056 #define ADDIEEE128(sum,carry,a,b) do { \
01057 (sum).coeff6 = (carry) += (a).coeff6 + (b).coeff6; \
01058 (carry) >>= AR_IEEE128_C6_BITS; \
01059 (sum).coeff5 = (carry) += (a).coeff5 + (b).coeff5; \
01060 (carry) >>= AR_IEEE128_C5_BITS; \
01061 (sum).coeff4 = (carry) += (a).coeff4 + (b).coeff4; \
01062 (carry) >>= AR_IEEE128_C4_BITS; \
01063 (sum).coeff3 = (carry) += (a).coeff3 + (b).coeff3; \
01064 (carry) >>= AR_IEEE128_C3_BITS; \
01065 (sum).coeff2 = (carry) += (a).coeff2 + (b).coeff2; \
01066 (carry) >>= AR_IEEE128_C2_BITS; \
01067 (sum).coeff1 = (carry) += (a).coeff1 + (b).coeff1; \
01068 (carry) >>= AR_IEEE128_C1_BITS; \
01069 (sum).coeff0 = (carry) += (a).coeff0 + (b).coeff0; \
01070 (carry) >>= AR_IEEE128_C0_BITS; \
01071 } while (0)
01072
01073
01074 #define CPLX32_IMAG_TO_IEEE32(s, c) ( \
01075 (s).sign = (c).isign, \
01076 (s).expo = (c).iexpo, \
01077 (s).coeff0 = (c).icoeff0, \
01078 (s).coeff1 = (c).icoeff1, \
01079 (s).zero = 0 )
01080
01081 #define CPLX32_REAL_TO_IEEE32(s, c) ( \
01082 (s).sign = (c).rsign, \
01083 (s).expo = (c).rexpo, \
01084 (s).coeff0 = (c).rcoeff0, \
01085 (s).coeff1 = (c).rcoeff1, \
01086 (s).zero = 0 )
01087
01088 #define IEEE32_TO_CPLX32_REAL(c, s) ( \
01089 (c).rsign = (s).sign, \
01090 (c).rexpo = (s).expo, \
01091 (c).rcoeff0 = (s).coeff0, \
01092 (c).rcoeff1 = (s).coeff1 )
01093
01094 #define IEEE32_TO_CPLX32_IMAG(c, s) ( \
01095 (c).isign = (s).sign, \
01096 (c).iexpo = (s).expo, \
01097 (c).icoeff0 = (s).coeff0, \
01098 (c).icoeff1 = (s).coeff1 )
01099
01100 #define IEEE32TOINT64(i,f) ( \
01101 (i).part1 = (i).part2 = 0, \
01102 (i).part3 = (f).sign << 15 | (f).expo << 7 | (f).coeff0, \
01103 (i).part4 = (f).coeff1 )
01104
01105 #define IEEE64TOINT64(i,f) ( \
01106 (i).part1 = (f).sign << 15 | (f).expo << 4 | (f).coeff0, \
01107 (i).part2 = (f).coeff1, \
01108 (i).part3 = (f).coeff2, \
01109 (i).part4 = (f).coeff3 )
01110
01111
01112 #define INCIEEE32(sum,carry) do { \
01113 (sum).coeff1 = (carry) += (sum).coeff1; \
01114 (carry) >>= AR_IEEE32_C1_BITS; \
01115 (sum).coeff0 = (carry) += (sum).coeff0; \
01116 (carry) >>= AR_IEEE32_C0_BITS; \
01117 } while (0)
01118
01119 #define INCIEEE64(sum,carry) do { \
01120 (sum).coeff3 = (carry) += (sum).coeff3; \
01121 (carry) >>= AR_IEEE64_C3_BITS; \
01122 (sum).coeff2 = (carry) += (sum).coeff2; \
01123 (carry) >>= AR_IEEE64_C2_BITS; \
01124 (sum).coeff1 = (carry) += (sum).coeff1; \
01125 (carry) >>= AR_IEEE64_C1_BITS; \
01126 (sum).coeff0 = (carry) += (sum).coeff0; \
01127 (carry) >>= AR_IEEE64_C0_BITS; \
01128 } while (0)
01129
01130 #define INCIEEE128(sum,carry) do { \
01131 (sum).coeff6 = (carry) += (sum).coeff6; \
01132 (carry) >>= AR_IEEE128_C6_BITS; \
01133 (sum).coeff5 = (carry) += (sum).coeff5; \
01134 (carry) >>= AR_IEEE128_C5_BITS; \
01135 (sum).coeff4 = (carry) += (sum).coeff4; \
01136 (carry) >>= AR_IEEE128_C4_BITS; \
01137 (sum).coeff3 = (carry) += (sum).coeff3; \
01138 (carry) >>= AR_IEEE128_C3_BITS; \
01139 (sum).coeff2 = (carry) += (sum).coeff2; \
01140 (carry) >>= AR_IEEE128_C2_BITS; \
01141 (sum).coeff1 = (carry) += (sum).coeff1; \
01142 (carry) >>= AR_IEEE128_C1_BITS; \
01143 (sum).coeff0 = (carry) += (sum).coeff0; \
01144 (carry) >>= AR_IEEE128_C0_BITS; \
01145 } while (0)
01146
01147
01148 #define INT64TOIEEE32(f,i) ( \
01149 (f).zero = 0, \
01150 (f).sign = (i).part3 >> 15, \
01151 (f).expo = (i).part3 >> 7, \
01152 (f).coeff0 = (i).part3, \
01153 (f).coeff1 = (i).part4 )
01154
01155 #define INT64TOIEEE64(f,i) ( \
01156 (f).sign = (i).part1 >> 15, \
01157 (f).expo = (i).part1 >> 4, \
01158 (f).coeff0 = (i).part1, \
01159 (f).coeff1 = (i).part2, \
01160 (f).coeff2 = (i).part3, \
01161 (f).coeff3 = (i).part4 )
01162
01163 #define INT64TOIEEE128(f,i) ( \
01164 (f).sign = (i).part1 >> 15, \
01165 (f).expo = (i).part1, \
01166 (f).coeff0 = (i).part2, \
01167 (f).coeff1 = (i).part3, \
01168 (f).coeff2 = (i).part4 )
01169
01170
01171 #define NOTIEEE32(x) ( (x).coeff0 ^= MASKR (AR_IEEE32_C0_BITS), \
01172 (x).coeff1 ^= MASKR (AR_IEEE32_C1_BITS) )
01173
01174 #define NOTIEEE64(x) ( (x).coeff0 ^= MASKR (AR_IEEE64_C0_BITS), \
01175 (x).coeff1 ^= MASKR (AR_IEEE64_C1_BITS), \
01176 (x).coeff2 ^= MASKR (AR_IEEE64_C2_BITS), \
01177 (x).coeff3 ^= MASKR (AR_IEEE64_C3_BITS) )
01178
01179 #define NOTIEEE128(x) ( (x).coeff0 ^= MASKR (AR_IEEE128_C0_BITS), \
01180 (x).coeff1 ^= MASKR (AR_IEEE128_C1_BITS), \
01181 (x).coeff2 ^= MASKR (AR_IEEE128_C2_BITS), \
01182 (x).coeff3 ^= MASKR (AR_IEEE128_C3_BITS), \
01183 (x).coeff4 ^= MASKR (AR_IEEE128_C4_BITS), \
01184 (x).coeff5 ^= MASKR (AR_IEEE128_C5_BITS), \
01185 (x).coeff6 ^= MASKR (AR_IEEE128_C6_BITS) )
01186
01187
01188 #define SHLEFTIEEE32(x) do { \
01189 (x).coeff0 = ((x).coeff0 << 1) | \
01190 ((x).coeff1 >> (AR_IEEE32_C1_BITS - 1)); \
01191 (x).coeff1 <<= 1; \
01192 } while (0)
01193
01194 #define SHLEFTIEEE64(x) do { \
01195 (x).coeff0 = ((x).coeff0 << 1) | \
01196 ((x).coeff1 >> (AR_IEEE64_C1_BITS - 1)); \
01197 (x).coeff1 = ((x).coeff1 << 1) | \
01198 ((x).coeff2 >> (AR_IEEE64_C2_BITS - 1)); \
01199 (x).coeff2 = ((x).coeff2 << 1) | \
01200 ((x).coeff3 >> (AR_IEEE64_C3_BITS - 1)); \
01201 (x).coeff3 <<= 1; \
01202 } while (0)
01203
01204 #define SHLEFTIEEE128(x) do { \
01205 (x).coeff0 = ((x).coeff0 << 1) | \
01206 ((x).coeff1 >> (AR_IEEE128_C1_BITS - 1)); \
01207 (x).coeff1 = ((x).coeff1 << 1) | \
01208 ((x).coeff2 >> (AR_IEEE128_C2_BITS - 1)); \
01209 (x).coeff2 = ((x).coeff2 << 1) | \
01210 ((x).coeff3 >> (AR_IEEE128_C3_BITS - 1)); \
01211 (x).coeff3 = ((x).coeff3 << 1) | \
01212 ((x).coeff4 >> (AR_IEEE128_C4_BITS - 1)); \
01213 (x).coeff4 = ((x).coeff4 << 1) | \
01214 ((x).coeff5 >> (AR_IEEE128_C5_BITS - 1)); \
01215 (x).coeff5 = ((x).coeff5 << 1) | \
01216 ((x).coeff6 >> (AR_IEEE128_C6_BITS - 1)); \
01217 (x).coeff6 <<= 1; \
01218 } while (0)
01219
01220
01221 #define SHLEFTIEEE32_2(x,y) do { \
01222 (x).coeff0 = ((x).coeff0 << 1) | \
01223 ((x).coeff1 >> (AR_IEEE32_C1_BITS - 1)); \
01224 (x).coeff1 = ((x).coeff1 << 1) | \
01225 ((y).coeff0 >> (AR_IEEE32_C0_BITS - 1)); \
01226 (y).coeff0 = ((y).coeff0 << 1) | \
01227 ((y).coeff1 >> (AR_IEEE32_C1_BITS - 1)); \
01228 (y).coeff1 <<= 1; \
01229 } while (0)
01230
01231 #define SHLEFTIEEE64_2(x,y) do { \
01232 (x).coeff0 = ((x).coeff0 << 1) | \
01233 ((x).coeff1 >> (AR_IEEE64_C1_BITS - 1)); \
01234 (x).coeff1 = ((x).coeff1 << 1) | \
01235 ((x).coeff2 >> (AR_IEEE64_C2_BITS - 1)); \
01236 (x).coeff2 = ((x).coeff2 << 1) | \
01237 ((x).coeff3 >> (AR_IEEE64_C3_BITS - 1)); \
01238 (x).coeff3 = ((x).coeff3 << 1) | \
01239 ((y).coeff0 >> (AR_IEEE64_C0_BITS - 1)); \
01240 (y).coeff0 = ((y).coeff0 << 1) | \
01241 ((y).coeff1 >> (AR_IEEE64_C1_BITS - 1)); \
01242 (y).coeff1 = ((y).coeff1 << 1) | \
01243 ((y).coeff2 >> (AR_IEEE64_C2_BITS - 1)); \
01244 (y).coeff2 = ((y).coeff2 << 1) | \
01245 ((y).coeff3 >> (AR_IEEE64_C3_BITS - 1)); \
01246 (y).coeff3 <<= 1; \
01247 } while (0)
01248
01249 #define SHLEFTIEEE128_2(x,y) do { \
01250 (x).coeff0 = ((x).coeff0 << 1) | \
01251 ((x).coeff1 >> (AR_IEEE128_C1_BITS - 1)); \
01252 (x).coeff1 = ((x).coeff1 << 1) | \
01253 ((x).coeff2 >> (AR_IEEE128_C2_BITS - 1)); \
01254 (x).coeff2 = ((x).coeff2 << 1) | \
01255 ((x).coeff3 >> (AR_IEEE128_C3_BITS - 1)); \
01256 (x).coeff3 = ((x).coeff3 << 1) | \
01257 ((x).coeff4 >> (AR_IEEE128_C4_BITS - 1)); \
01258 (x).coeff4 = ((x).coeff4 << 1) | \
01259 ((x).coeff5 >> (AR_IEEE128_C5_BITS - 1)); \
01260 (x).coeff5 = ((x).coeff5 << 1) | \
01261 ((x).coeff6 >> (AR_IEEE128_C6_BITS - 1)); \
01262 (x).coeff6 = ((x).coeff6 << 1) | \
01263 ((y).coeff0 >> (AR_IEEE128_C0_BITS - 1)); \
01264 (y).coeff0 = ((y).coeff0 << 1) | \
01265 ((y).coeff1 >> (AR_IEEE128_C1_BITS - 1)); \
01266 (y).coeff1 = ((y).coeff1 << 1) | \
01267 ((y).coeff2 >> (AR_IEEE128_C2_BITS - 1)); \
01268 (y).coeff2 = ((y).coeff2 << 1) | \
01269 ((y).coeff3 >> (AR_IEEE128_C3_BITS - 1)); \
01270 (y).coeff3 = ((y).coeff3 << 1) | \
01271 ((y).coeff4 >> (AR_IEEE128_C4_BITS - 1)); \
01272 (y).coeff4 = ((y).coeff4 << 1) | \
01273 ((y).coeff5 >> (AR_IEEE128_C5_BITS - 1)); \
01274 (y).coeff5 = ((y).coeff5 << 1) | \
01275 ((y).coeff6 >> (AR_IEEE128_C6_BITS - 1)); \
01276 (y).coeff6 <<= 1; \
01277 } while (0)
01278
01279
01280 #define SHRIGHTIEEE32(x) do { \
01281 (x).coeff1 = ((x).coeff1 >> 1) | \
01282 ((x).coeff0 << (AR_IEEE32_C1_BITS - 1)); \
01283 (x).coeff0 >>= 1; \
01284 } while (0)
01285
01286 #define SHRIGHTIEEE64(x) do { \
01287 (x).coeff3 = ((x).coeff3 >> 1) | \
01288 ((x).coeff2 << (AR_IEEE64_C3_BITS - 1)); \
01289 (x).coeff2 = ((x).coeff2 >> 1) | \
01290 ((x).coeff1 << (AR_IEEE64_C2_BITS - 1)); \
01291 (x).coeff1 = ((x).coeff1 >> 1) | \
01292 ((x).coeff0 << (AR_IEEE64_C1_BITS - 1)); \
01293 (x).coeff0 >>= 1; \
01294 } while (0)
01295
01296 #define SHRIGHTIEEE128(x) do { \
01297 (x).coeff6 = ((x).coeff6 >> 1) | \
01298 ((x).coeff5 << (AR_IEEE128_C6_BITS - 1)); \
01299 (x).coeff5 = ((x).coeff5 >> 1) | \
01300 ((x).coeff4 << (AR_IEEE128_C5_BITS - 1)); \
01301 (x).coeff4 = ((x).coeff4 >> 1) | \
01302 ((x).coeff3 << (AR_IEEE128_C4_BITS - 1)); \
01303 (x).coeff3 = ((x).coeff3 >> 1) | \
01304 ((x).coeff2 << (AR_IEEE128_C3_BITS - 1)); \
01305 (x).coeff2 = ((x).coeff2 >> 1) | \
01306 ((x).coeff1 << (AR_IEEE128_C2_BITS - 1)); \
01307 (x).coeff1 = ((x).coeff1 >> 1) | \
01308 ((x).coeff0 << (AR_IEEE128_C1_BITS - 1)); \
01309 (x).coeff0 >>= 1; \
01310 } while (0)
01311
01312
01313 #define SHRIGHTIEEE32_2(x,y) do { \
01314 (y).coeff1 = ((y).coeff1 >> 1) | \
01315 ((y).coeff0 << (AR_IEEE32_C1_BITS - 1)); \
01316 (y).coeff0 = ((y).coeff0 >> 1) | \
01317 ((x).coeff1 << (AR_IEEE32_C0_BITS - 1)); \
01318 (x).coeff1 = ((x).coeff1 >> 1) | \
01319 ((x).coeff0 << (AR_IEEE32_C1_BITS - 1)); \
01320 (x).coeff0 >>= 1; \
01321 } while (0)
01322
01323 #define SHRIGHTIEEE64_2(x,y) do { \
01324 (y).coeff3 = ((y).coeff3 >> 1) | \
01325 ((y).coeff2 << (AR_IEEE64_C3_BITS - 1)); \
01326 (y).coeff2 = ((y).coeff2 >> 1) | \
01327 ((y).coeff1 << (AR_IEEE64_C2_BITS - 1)); \
01328 (y).coeff1 = ((y).coeff1 >> 1) | \
01329 ((y).coeff0 << (AR_IEEE64_C1_BITS - 1)); \
01330 (y).coeff0 = ((y).coeff0 >> 1) | \
01331 ((x).coeff3 << (AR_IEEE64_C0_BITS - 1)); \
01332 (x).coeff3 = ((x).coeff3 >> 1) | \
01333 ((x).coeff2 << (AR_IEEE64_C3_BITS - 1)); \
01334 (x).coeff2 = ((x).coeff2 >> 1) | \
01335 ((x).coeff1 << (AR_IEEE64_C2_BITS - 1)); \
01336 (x).coeff1 = ((x).coeff1 >> 1) | \
01337 ((x).coeff0 << (AR_IEEE64_C1_BITS - 1)); \
01338 (x).coeff0 >>= 1; \
01339 } while (0)
01340
01341 #define SHRIGHTIEEE128_2(x,y) do { \
01342 (y).coeff6 = ((y).coeff6 >> 1) | \
01343 ((y).coeff5 << (AR_IEEE128_C6_BITS - 1)); \
01344 (y).coeff5 = ((y).coeff5 >> 1) | \
01345 ((y).coeff4 << (AR_IEEE128_C5_BITS - 1)); \
01346 (y).coeff4 = ((y).coeff4 >> 1) | \
01347 ((y).coeff3 << (AR_IEEE128_C4_BITS - 1)); \
01348 (y).coeff3 = ((y).coeff3 >> 1) | \
01349 ((y).coeff2 << (AR_IEEE128_C3_BITS - 1)); \
01350 (y).coeff2 = ((y).coeff2 >> 1) | \
01351 ((y).coeff1 << (AR_IEEE128_C2_BITS - 1)); \
01352 (y).coeff1 = ((y).coeff1 >> 1) | \
01353 ((y).coeff0 << (AR_IEEE128_C1_BITS - 1)); \
01354 (y).coeff0 = ((y).coeff0 >> 1) | \
01355 ((x).coeff6 << (AR_IEEE128_C0_BITS - 1)); \
01356 (x).coeff6 = ((x).coeff6 >> 1) | \
01357 ((x).coeff5 << (AR_IEEE128_C6_BITS - 1)); \
01358 (x).coeff5 = ((x).coeff5 >> 1) | \
01359 ((x).coeff4 << (AR_IEEE128_C5_BITS - 1)); \
01360 (x).coeff4 = ((x).coeff4 >> 1) | \
01361 ((x).coeff3 << (AR_IEEE128_C4_BITS - 1)); \
01362 (x).coeff3 = ((x).coeff3 >> 1) | \
01363 ((x).coeff2 << (AR_IEEE128_C3_BITS - 1)); \
01364 (x).coeff2 = ((x).coeff2 >> 1) | \
01365 ((x).coeff1 << (AR_IEEE128_C2_BITS - 1)); \
01366 (x).coeff1 = ((x).coeff1 >> 1) | \
01367 ((x).coeff0 << (AR_IEEE128_C1_BITS - 1)); \
01368 (x).coeff0 >>= 1; \
01369 } while (0)
01370
01371
01372 #define ZEROIEEE32(x) ((x).zero = (x).sign = (x).expo = (x).coeff0 =\
01373 (x).coeff1 = 0)
01374
01375 #define ZEROIEEE64(x) ((x).sign = (x).expo = (x).coeff0 = \
01376 (x).coeff1 = (x).coeff2 = (x).coeff3 = 0)
01377
01378 #define ZEROIEEE128(x) ((x).sign = (x).expo = (x).coeff0 = \
01379 (x).coeff1 = (x).coeff2 = (x).coeff3 = \
01380 (x).coeff4 = (x).coeff5 = (x).coeff6 = 0)
01381
01382 #define ZEROIEEE128M(x) ((x).sign = (x).expo = (x).coeff0 = \
01383 (x).coeff1 = (x).coeff2 = (x).coeff3 = \
01384 (x).signl = (x).expol = (x).coeff0l = \
01385 (x).coeff1l = (x).coeff2l = (x).coeff3l = 0)
01386
01387
01388 #define QNaNIEEE32(x) do { \
01389 ZEROIEEE32(*x); \
01390 NOTIEEE32(*x); \
01391 if (HOST_IS_MIPS) { \
01392 (x)->coeff0 ^= (1 << (AR_IEEE32_C0_BITS - 1)); \
01393 } \
01394 (x)->expo = AR_IEEE32_MAX_EXPO + 1; \
01395 } while (0)
01396
01397 #define QNaNIEEE64(x) do { \
01398 ZEROIEEE64(*x); \
01399 NOTIEEE64(*x); \
01400 if (HOST_IS_MIPS) { \
01401 (x)->coeff0 ^= (1 << (AR_IEEE64_C0_BITS - 1)); \
01402 } \
01403 (x)->expo = AR_IEEE64_MAX_EXPO + 1; \
01404 } while (0)
01405
01406 #define QNaNIEEE128(x) do { \
01407 if (HOST_IS_MIPS) { \
01408 ZEROIEEE128M(*((AR_MIPS_128 *) x)); \
01409 ((AR_MIPS_128 *) x)->coeff0 = MASKR (AR_IEEE64_C0_BITS - 1); \
01410 ((AR_MIPS_128 *) x)->coeff1 = MASKR (AR_IEEE64_C1_BITS ); \
01411 ((AR_MIPS_128 *) x)->coeff2 = MASKR (AR_IEEE64_C2_BITS ); \
01412 ((AR_MIPS_128 *) x)->coeff3 = MASKR (AR_IEEE64_C3_BITS ); \
01413 ((AR_MIPS_128 *) x)->expo = AR_IEEE64_MAX_EXPO + 1; \
01414 } \
01415 else { \
01416 ZEROIEEE128(*x); \
01417 NOTIEEE128(*x); \
01418 (x)->expo = AR_IEEE128_MAX_EXPO + 1; \
01419 } \
01420 } while (0)
01421
01422
01423
01424
01425 #define ADDCRAY64(sum,carry,a,b) do { \
01426 (sum).coeff2 = (carry) += (a).coeff2 + (b).coeff2; \
01427 (carry) >>= AR_CRAY_C2_BITS; \
01428 (sum).coeff1 = (carry) += (a).coeff1 + (b).coeff1; \
01429 (carry) >>= AR_CRAY_C1_BITS; \
01430 (sum).coeff0 = (carry) += (a).coeff0 + (b).coeff0; \
01431 (carry) >>= AR_CRAY_C0_BITS; \
01432 } while (0)
01433
01434 #define ADDCRAY128(sum,carry,a,b) do { \
01435 (sum).coeff5 = (carry) += (a).coeff5 + (b).coeff5; \
01436 (carry) >>= AR_CRAY_C5_BITS; \
01437 (sum).coeff4 = (carry) += (a).coeff4 + (b).coeff4; \
01438 (carry) >>= AR_CRAY_C4_BITS; \
01439 (sum).coeff3 = (carry) += (a).coeff3 + (b).coeff3; \
01440 (carry) >>= AR_CRAY_C3_BITS; \
01441 (sum).coeff2 = (carry) += (a).coeff2 + (b).coeff2; \
01442 (carry) >>= AR_CRAY_C2_BITS; \
01443 (sum).coeff1 = (carry) += (a).coeff1 + (b).coeff1; \
01444 (carry) >>= AR_CRAY_C1_BITS; \
01445 (sum).coeff0 = (carry) += (a).coeff0 + (b).coeff0; \
01446 (carry) >>= AR_CRAY_C0_BITS; \
01447 } while (0)
01448
01449 #define CRAY64TO128(d,s) ( \
01450 (d).sign = (s).sign, \
01451 (d).expo = (s).expo, \
01452 (d).coeff0 = (s).coeff0, \
01453 (d).coeff1 = (s).coeff1, \
01454 (d).coeff2 = (s).coeff2, \
01455 (d).zero = (d).coeff3 = (d).coeff4 = (d).coeff5 = 0 )
01456
01457 #define CRAY128TO64(s,d) ( \
01458 (s).sign = (d).sign, \
01459 (s).expo = (d).expo, \
01460 (s).coeff0 = (d).coeff0, \
01461 (s).coeff1 = (d).coeff1, \
01462 (s).coeff2 = (d).coeff2 )
01463
01464 #define CRAY64TOINT64(i,c) ( \
01465 (i).part1 = (c).sign << 15 | (c).expo, \
01466 (i).part2 = (c).coeff0, \
01467 (i).part3 = (c).coeff1, \
01468 (i).part4 = (c).coeff2 )
01469
01470 #define INCCRAY64(sum,carry) do { \
01471 (sum).coeff2 = (carry) += (sum).coeff2; \
01472 (carry) >>= AR_CRAY_C2_BITS; \
01473 (sum).coeff1 = (carry) += (sum).coeff1; \
01474 (carry) >>= AR_CRAY_C1_BITS; \
01475 (sum).coeff0 = (carry) += (sum).coeff0; \
01476 (carry) >>= AR_CRAY_C0_BITS; \
01477 } while (0)
01478
01479 #define INCCRAY128(sum,carry) do { \
01480 (sum).coeff5 = (carry) += (sum).coeff5; \
01481 (carry) >>= AR_CRAY_C5_BITS; \
01482 (sum).coeff4 = (carry) += (sum).coeff4; \
01483 (carry) >>= AR_CRAY_C4_BITS; \
01484 (sum).coeff3 = (carry) += (sum).coeff3; \
01485 (carry) >>= AR_CRAY_C3_BITS; \
01486 (sum).coeff2 = (carry) += (sum).coeff2; \
01487 (carry) >>= AR_CRAY_C2_BITS; \
01488 (sum).coeff1 = (carry) += (sum).coeff1; \
01489 (carry) >>= AR_CRAY_C1_BITS; \
01490 (sum).coeff0 = (carry) += (sum).coeff0; \
01491 (carry) >>= AR_CRAY_C0_BITS; \
01492 } while (0)
01493
01494 #define INT64TOCRAY64(c,i) ( \
01495 (c).sign = (i).part1 >> 15, \
01496 (c).expo = (i).part1, \
01497 (c).coeff0 = (i).part2, \
01498 (c).coeff1 = (i).part3, \
01499 (c).coeff2 = (i).part4 )
01500
01501 #define NOTCRAY64(x) ( (x).coeff0 ^= MASKR (AR_CRAY_C0_BITS), \
01502 (x).coeff1 ^= MASKR (AR_CRAY_C1_BITS), \
01503 (x).coeff2 ^= MASKR (AR_CRAY_C2_BITS) )
01504
01505 #define NOTCRAY128(x) ( (x).coeff0 ^= MASKR (AR_CRAY_C0_BITS), \
01506 (x).coeff1 ^= MASKR (AR_CRAY_C1_BITS), \
01507 (x).coeff2 ^= MASKR (AR_CRAY_C2_BITS), \
01508 (x).coeff3 ^= MASKR (AR_CRAY_C3_BITS), \
01509 (x).coeff4 ^= MASKR (AR_CRAY_C4_BITS), \
01510 (x).coeff5 ^= MASKR (AR_CRAY_C5_BITS) )
01511
01512 #if _CRAY
01513 #define SHLEFTCRAY64(x) \
01514 (*((long*)&(x)) = \
01515 (*((long*)&(x))&~MASKR(AR_CRAY64_COEFF_BITS)) | \
01516 ((*((long*)&(x))<<1)&MASKR(AR_CRAY64_COEFF_BITS)))
01517 #else
01518 #define SHLEFTCRAY64(x) do { \
01519 (x).coeff0 = ((x).coeff0 << 1) | \
01520 ((x).coeff1 >> (AR_CRAY_C1_BITS - 1)); \
01521 (x).coeff1 = ((x).coeff1 << 1) | \
01522 ((x).coeff2 >> (AR_CRAY_C2_BITS - 1)); \
01523 (x).coeff2 <<= 1; \
01524 } while (0)
01525 #endif
01526
01527 #define SHLEFTCRAY128(x) do { \
01528 (x).coeff0 = ((x).coeff0 << 1) | \
01529 ((x).coeff1 >> (AR_CRAY_C1_BITS - 1)); \
01530 (x).coeff1 = ((x).coeff1 << 1) | \
01531 ((x).coeff2 >> (AR_CRAY_C2_BITS - 1)); \
01532 (x).coeff2 = ((x).coeff2 << 1) | \
01533 ((x).coeff3 >> (AR_CRAY_C3_BITS - 1)); \
01534 (x).coeff3 = ((x).coeff3 << 1) | \
01535 ((x).coeff4 >> (AR_CRAY_C4_BITS - 1)); \
01536 (x).coeff4 = ((x).coeff4 << 1) | \
01537 ((x).coeff5 >> (AR_CRAY_C5_BITS - 1)); \
01538 (x).coeff5 <<= 1; \
01539 } while (0)
01540
01541 #if _CRAY
01542 #define SHRIGHTCRAY64(x) \
01543 (*((long*)&(x)) = \
01544 (*((long*)&(x))&~MASKR(AR_CRAY64_COEFF_BITS)) | \
01545 ((*((long*)&(x))&MASKR(AR_CRAY64_COEFF_BITS))>>1))
01546 #else
01547 #define SHRIGHTCRAY64(x) do { \
01548 (x).coeff2 = ((x).coeff2 >> 1) | \
01549 ((x).coeff1 << (AR_CRAY_C2_BITS - 1)); \
01550 (x).coeff1 = ((x).coeff1 >> 1) | \
01551 ((x).coeff0 << (AR_CRAY_C1_BITS - 1)); \
01552 (x).coeff0 >>= 1; \
01553 } while (0)
01554 #endif
01555
01556 #define SHRIGHTCRAY128(x) do { \
01557 (x).coeff5 = ((x).coeff5 >> 1) | \
01558 ((x).coeff4 << (AR_CRAY_C5_BITS - 1)); \
01559 (x).coeff4 = ((x).coeff4 >> 1) | \
01560 ((x).coeff3 << (AR_CRAY_C4_BITS - 1)); \
01561 (x).coeff3 = ((x).coeff3 >> 1) | \
01562 ((x).coeff2 << (AR_CRAY_C3_BITS - 1)); \
01563 (x).coeff2 = ((x).coeff2 >> 1) | \
01564 ((x).coeff1 << (AR_CRAY_C2_BITS - 1)); \
01565 (x).coeff1 = ((x).coeff1 >> 1) | \
01566 ((x).coeff0 << (AR_CRAY_C1_BITS - 1)); \
01567 (x).coeff0 >>= 1; \
01568 } while (0)
01569
01570 #define ZEROCRAY64(x) \
01571 ((x).sign = (x).expo = (x).coeff0 = (x).coeff1 = (x).coeff2 = 0)
01572
01573 #define ZEROCRAY128(x) \
01574 ((x).sign = (x).expo = (x).coeff0 = (x).coeff1 = (x).coeff2 = \
01575 (x).zero = (x).coeff3 = (x).coeff4 = (x).coeff5 = 0)
01576
01577
01578 #endif