Open64 (mfef90, whirl2f, and IR tools)  TAG: version-openad; SVN changeset: 916
asm.h
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00001 /*
00002 
00003   Copyright (C) 2000, 2001 Silicon Graphics, Inc.  All Rights Reserved.
00004 
00005   This program is free software; you can redistribute it and/or modify it
00006   under the terms of version 2 of the GNU General Public License as
00007   published by the Free Software Foundation.
00008 
00009   This program is distributed in the hope that it would be useful, but
00010   WITHOUT ANY WARRANTY; without even the implied warranty of
00011   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00012 
00013   Further, this software is distributed without any warranty that it is
00014   free of the rightful claim of any third person regarding infringement 
00015   or the like.  Any license provided herein, whether implied or 
00016   otherwise, applies only to this software file.  Patent licenses, if 
00017   any, provided herein do not apply to combinations of this program with 
00018   other software, or any other product whatsoever.  
00019 
00020   You should have received a copy of the GNU General Public License along
00021   with this program; if not, write the Free Software Foundation, Inc., 59
00022   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00023 
00024   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00025   Mountain View, CA 94043, or:
00026 
00027   http://www.sgi.com
00028 
00029   For further information regarding this notice, see:
00030 
00031   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00032 
00033 */
00034 
00035 
00036 /* USMID:  "\n@(#)5.0_pl/headers/asm.h  5.1     04/29/99 21:22:31\n" */
00037 
00038 
00039 /*
00040 Include file of opcodes for cray intrinsic functions.
00041 */
00042 
00043 
00044 /*
00045    For opcodes that require register numbers as such i or j, 
00046    they are set to 0 for that bit that contains the register 
00047    number except for intrinsic function "read_CA" in which 
00048    the j register is set to one, since j can not be 0.  
00049    A negative opcode indicates that there is no opcode 
00050    to represent the operation. 
00051 */
00052 
00053 
00054 
00055 
00056 /* PVP Intrinsic Op Codes */
00057 enum pvp_mif_asm_codes_tag {
00058         _getvm_op            = 0073000,
00059         _setvm_op            = 0003000,
00060         _cmr_op              = 0002700,
00061         _EX_op               = 0004000,
00062         _readSR_op           = 0073001,
00063         _readSB_op           = 0026007,
00064         _readST_op           = 0072003,
00065         _semget_op           = 0072002,
00066         _semput_op           = 0073002,
00067         _writeSB_op          = 0027006,
00068         _writeST_op          = 0073003,
00069         _semclr_op           = 0003600,
00070         _semset_op           = 0003700,
00071         _semts_op            = 0003400,
00072         _jts_op              = 0006400,
00073         _readSBi_op          = 0026006,
00074         _ESC_op              = 0002501,
00075         _DSC_op              = 0002601,
00076         _readbpc_op          = 0120060,
00077         _CCI_op              = 0001405,
00078         _CIPI_op             = 0001402,
00079         _clrCI_op            = 0001200,
00080         _DCI_op              = 0001407,
00081         _ECI_op              = 0001406,
00082         _ERR_op              = 0000000,
00083         _loadRT_op           = 0001400,
00084         _MC_op               = 0001201,
00085         _PCI_op              = 0001404,
00086         _readB_op            = 0024000,
00087         _readCI_op           = 0033000,
00088         _readCA_op           = 0033010,
00089         _readCE_op           = 0033001,
00090         _readXA_op           = 0001301,
00091         _readEA_op           = 0023006,
00092         _SETC_op             = 0001403,
00093         _setCA_op            = 0001000,
00094         _setEA_op            = 0027002,
00095         _setCL_op            = 0001100,
00096         _setXA_op            = 0001300,
00097         _SIPI_op             = 0001401,
00098         _DI_op               = 0001202,
00099         _DMI_op              = 0001303,
00100         _EMI_op              = 0001302,
00101         _EI_op               = 0001203,
00102         _ESI_op              = 0001600,
00103         _rjump_op            = 0007000,
00104         _writeBP_op          = 0001700,
00105         _writeSR_op          = 0073005,
00106         _chanDI_op           = -4,
00107         _chanEI_op           = -5,
00108         _int_mult_upper_op   = -6,
00109         _pvp_last_op    = 0777777
00110 };
00111 
00112 typedef enum pvp_mif_asm_codes_tag pvp_mif_asm_codes;
00113 
00114 
00115 /* MPP Intrinsic Op Codes */
00116 
00117 enum mpp_mif_asm_codes_tag {
00118         _memory_barrier_op                       = 2,
00119         _remote_write_barrier_op                 = 3,
00120         _write_memory_barrier_op                 = 5,
00121         _mpp_last_op                             = 99
00122 };
00123 
00124 typedef enum mpp_mif_asm_codes_tag mpp_mif_asm_codes;
00125 
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