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00064 #include "config_targ2.h"
00065
00066
00067
00068
00069
00070
00071
00072 char *ABI_Name = NULL;
00073 char *ISA_Name = NULL;
00074 char *Processor_Name = NULL;
00075 static char * Platform_Name = NULL;
00076 INT16 Target_FPRs = 0;
00077 BOOL Pure_ABI = FALSE;
00078
00079
00080 BOOL Force_FP_Precise_Mode = FALSE;
00081 BOOL Force_Memory_Dismiss = FALSE;
00082 BOOL Force_Page_Zero = FALSE;
00083 BOOL Force_SMM = FALSE;
00084 char *FP_Excp_Max = NULL;
00085 char *FP_Excp_Min = NULL;
00086 BOOL Flush_To_Zero = FALSE;
00087
00088
00089 BOOL Madd_Allowed = TRUE;
00090 BOOL Force_Jalr = FALSE;
00091 static BOOL Slow_CVTDL_Set = FALSE;
00092
00093 BOOL Itanium_a0_step = FALSE;
00094 BOOL SYNC_Allowed = TRUE;
00095 BOOL Slow_CVTDL = FALSE;
00096
00097
00098
00099
00100
00101 static OPTION_DESC Options_TARG[] = {
00102 { OVK_NAME, OV_VISIBLE, FALSE, "abi", "ab",
00103 0, 0, 0, &ABI_Name, NULL,
00104 "Specify the ABI to follow" },
00105 { OVK_NAME, OV_VISIBLE, FALSE, "isa", "is",
00106 0, 0, 0, &ISA_Name, NULL,
00107 "Specify the instruction set architecture to use" },
00108 #if 0
00109 { OVK_SELF, OV_SHY, FALSE, "mips1", NULL,
00110 0, 0, 0, &ISA_Name, NULL,
00111 "Use the MIPS-I instruction set architecture" },
00112 { OVK_SELF, OV_SHY, FALSE, "mips2", NULL,
00113 0, 0, 0, &ISA_Name, NULL,
00114 "Use the MIPS-II instruction set architecture" },
00115 { OVK_SELF, OV_SHY, FALSE, "mips3", NULL,
00116 0, 0, 0, &ISA_Name, NULL,
00117 "Use the MIPS-III instruction set architecture" },
00118 { OVK_SELF, OV_SHY, FALSE, "mips4", NULL,
00119 0, 0, 0, &ISA_Name, NULL,
00120 "Use the MIPS-IV instruction set architecture" },
00121 { OVK_SELF, OV_SHY, FALSE, "mips5", NULL,
00122 0, 0, 0, &ISA_Name, NULL,
00123 "Use the MIPS-V instruction set architecture" },
00124 { OVK_SELF, OV_SHY, FALSE, "mips6", NULL,
00125 0, 0, 0, &ISA_Name, NULL,
00126 "Use the MIPS-VI instruction set architecture" },
00127 #endif
00128 { OVK_NAME, OV_VISIBLE, FALSE, "platform", "pl",
00129 0, 0, 0, &Platform_Name, NULL,
00130 "Specify the target platform" },
00131 { OVK_NAME, OV_VISIBLE, FALSE, "processor", "pr",
00132 0, 0, 0, &Processor_Name, NULL,
00133 "Specify the target microprocessor" },
00134
00135
00136 { OVK_BOOL, OV_VISIBLE, FALSE, "dismiss_mem_faults", "dis",
00137 0, 0, 0, &Force_Memory_Dismiss, NULL,
00138 "Force kernel to ignore memory faults (SIGSEGV/SIGBUS)" },
00139 { OVK_NAME, OV_VISIBLE, FALSE, "exc_max", "exc_ma",
00140 0, 0, 0, &FP_Excp_Max, NULL,
00141 "Specify the only floating point exceptions which may be trapped" },
00142 { OVK_NAME, OV_VISIBLE, FALSE, "exc_min", "exc_mi",
00143 0, 0, 0, &FP_Excp_Min, NULL,
00144 "Specify any floating point exceptions which must be trapped" },
00145 { OVK_BOOL, OV_SHY, FALSE, "force_jalr", "",
00146 0, 0, 0, &Force_Jalr, NULL,
00147 "Force use of JALR instruction for all subprogram calls" },
00148 { OVK_BOOL, OV_VISIBLE, FALSE, "flush_to_zero", "",
00149 0, 0, 0, &Flush_To_Zero, NULL,
00150 "Suppress floating point underflow exceptions" },
00151 { OVK_BOOL, OV_VISIBLE, FALSE, "fp_precise", "fp_p",
00152 0, 0, 0, &Force_FP_Precise_Mode, NULL,
00153 "Force the processor into precise floating point mode" },
00154 { OVK_INT32, OV_INTERNAL, FALSE, "fp_regs", "fp_r",
00155 32, 16, 32, &Target_FPRs, NULL,
00156 "Specify number of FP registers to use (16 or 32)" },
00157 { OVK_BOOL, OV_VISIBLE, FALSE, "madd", "",
00158 0, 0, 0, &Madd_Allowed, NULL,
00159 "Specify whether to generate MADD instructions" },
00160 { OVK_BOOL, OV_SHY, FALSE, "page_zero", "",
00161 0, 0, 0, &Force_Page_Zero, NULL,
00162 "Force the kernel to map page zero into address space" },
00163 { OVK_BOOL, OV_INTERNAL, FALSE, "slow_cvtdl", "",
00164 0, 0, 0, &Slow_CVTDL, &Slow_CVTDL_Set,
00165 "" },
00166 { OVK_BOOL, OV_SHY, FALSE, "seq_memory", "seq",
00167 0, 0, 0, &Force_SMM, NULL,
00168 "Force the processor into sequential memory mode" },
00169 { OVK_BOOL, OV_VISIBLE, FALSE, "sync", "",
00170 0, 0, 0, &SYNC_Allowed, NULL,
00171 "Specify whether to generate SYNC instructions" },
00172 { OVK_BOOL, OV_INTERNAL, FALSE, "pure", "pu",
00173 0, 0, 0, &Pure_ABI, NULL,
00174 "Generate pure ABI-compliant code" },
00175
00176 { OVK_BOOL, OV_INTERNAL, FALSE, "ma0_step", "",
00177 0, 0, 0, &Itanium_a0_step, NULL,
00178 "" },
00179
00180
00181
00182
00183 { OVK_COUNT }
00184 };
00185
00186
00187
00188
00189
00190
00191
00192
00193
00194
00195 static void
00196 Configure_Source_TARG ( char *filename )
00198 {
00199 }