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fpu.h
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00001 /*
00002 
00003   Copyright (C) 2000, 2001 Silicon Graphics, Inc.  All Rights Reserved.
00004 
00005   This program is free software; you can redistribute it and/or modify it
00006   under the terms of version 2 of the GNU General Public License as
00007   published by the Free Software Foundation.
00008 
00009   This program is distributed in the hope that it would be useful, but
00010   WITHOUT ANY WARRANTY; without even the implied warranty of
00011   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00012 
00013   Further, this software is distributed without any warranty that it is
00014   free of the rightful claim of any third person regarding infringement 
00015   or the like.  Any license provided herein, whether implied or 
00016   otherwise, applies only to this software file.  Patent licenses, if 
00017   any, provided herein do not apply to combinations of this program with 
00018   other software, or any other product whatsoever.  
00019 
00020   You should have received a copy of the GNU General Public License along
00021   with this program; if not, write the Free Software Foundation, Inc., 59
00022   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00023 
00024   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00025   Mountain View, CA 94043, or:
00026 
00027   http://www.sgi.com
00028 
00029   For further information regarding this notice, see:
00030 
00031   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00032 
00033 */
00034 
00035 
00036 #ifndef __SYS_FPU_H__
00037 #define __SYS_FPU_H__
00038 #ifdef __cplusplus
00039 extern "C" {
00040 #endif
00041 
00042 
00043 /* %Q% %I% %M% */
00044 
00045 
00046 /*
00047  * fpu.h -- fpu specific defines
00048  */
00049 
00050 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00051 /*
00052  * Structure and constant definisions for floating-point instructions.
00053  */
00054 union fpu_instr {
00055         unsigned int instr;
00056 
00057         struct {
00058 #ifdef _MIPSEB
00059                 unsigned op : 6;
00060                 unsigned base : 5;
00061                 unsigned rt : 5;
00062                 signed immed : 16;
00063 #endif /* _MIPSEB */
00064 #ifdef _MIPSEL
00065                 signed immed : 16;
00066                 unsigned rt : 5;
00067                 unsigned base : 5;
00068                 unsigned op : 6;
00069 #endif /* _MIPSEL */
00070         } itype;
00071 
00072         struct {
00073 #ifdef _MIPSEB
00074                 unsigned op : 6;
00075                 unsigned sub : 5;
00076                 unsigned rt : 5;
00077                 unsigned rs : 5;
00078                 unsigned : 11;
00079 #endif /* _MIPSEB */
00080 #ifdef _MIPSEL
00081                 unsigned : 11;
00082                 unsigned rs : 5;
00083                 unsigned rt : 5;
00084                 unsigned sub : 5;
00085                 unsigned op : 6;
00086 #endif /* _MIPSEL */
00087         } mtype;
00088 
00089         struct {
00090 #ifdef _MIPSEB
00091                 unsigned op : 6;
00092                 unsigned one : 1;
00093                 unsigned fmt : 4;
00094                 unsigned rt : 5;
00095                 unsigned rs : 5;
00096                 unsigned rd : 5;
00097                 unsigned func : 6;
00098 #endif /* _MIPSEB */
00099 #ifdef _MIPSEL
00100                 unsigned func : 6;
00101                 unsigned rd : 5;
00102                 unsigned rs : 5;
00103                 unsigned rt : 5;
00104                 unsigned fmt : 4;
00105                 unsigned one : 1;
00106                 unsigned op : 6;
00107 #endif /* _MIPSEL */
00108         } rtype;
00109 
00110         struct {
00111 #ifdef _MIPSEB
00112                 unsigned op : 6;
00113                 unsigned rr : 5;
00114                 unsigned rt : 5;
00115                 unsigned rs : 5;
00116                 unsigned rd : 5;
00117                 unsigned func : 3;
00118                 unsigned fmt : 3;
00119 #endif /* _MIPSEB */
00120 #ifdef _MIPSEL
00121                 unsigned fmt : 3;
00122                 unsigned func : 3;
00123                 unsigned rd : 5;
00124                 unsigned rs : 5;
00125                 unsigned rt : 5;
00126                 unsigned rr : 5;
00127                 unsigned op : 6;
00128 #endif /* _MIPSEL */
00129         } r4type;
00130 };
00131 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00132 
00133 #define FMT_SINGLE      0
00134 #define FMT_DOUBLE      1
00135 #define FMT_EXTENDED    2
00136 #define FMT_QUAD        3
00137 #define FMT_WORD        4
00138 #define FMT_LONGWORD    5
00139 #define FMT_MAX         5
00140 
00141 #define FUNC_ADD        0
00142 #define FUNC_SUB        1
00143 #define FUNC_MUL        2
00144 #define FUNC_DIV        3
00145 
00146 #define FUNC_SQRT       4
00147 #define FUNC_ABS        5
00148 #define FUNC_MOV        6
00149 #define FUNC_NEG        7
00150 
00151 #define FUNC_ROUNDL     0x08
00152 #define FUNC_TRUNCL     0x09
00153 #define FUNC_CEILL      0x0a
00154 #define FUNC_FLOORL     0x0b
00155 
00156 #define FUNC_ROUND      0x0c
00157 #define FUNC_TRUNC      0x0d
00158 #define FUNC_CEIL       0x0e
00159 #define FUNC_FLOOR      0x0f
00160 
00161 #define FUNC_RECIP      0x15
00162 #define FUNC_RSQRT      0x16
00163 
00164 #define FUNC_CVTS       0x20
00165 #define FUNC_CVTD       0x21
00166 #define FUNC_CVTE       0x22
00167 #define FUNC_CVTQ       0x23
00168 #define FUNC_CVTW       0x24
00169 #define FUNC_CVTL       0x25
00170 
00171 /*
00172  * op codes for madd, msub, nmadd, nmsub; notice that these are
00173  * the same as some of the other floating point op codes, however
00174  * they are COP1X functions.  To distinguish them in code, do
00175  * something like adding 64 to the op code.  Then you can do
00176  * a switch statement with cases like
00177  * case FUNC_MADD+64:
00178  */
00179 
00180 #define FUNC_MADD       0x4
00181 #define FUNC_MSUB       0x5
00182 #define FUNC_NMADD      0x6
00183 #define FUNC_NMSUB      0x7
00184 
00185 /*
00186  * The func field of floating-point compare opcodes are FUNC_FC with
00187  * some combination of conditions (COND_*).
00188  */
00189 #define FUNC_FC         0x30
00190 #define COND_UN_MASK    0x1
00191 #define COND_EQ_MASK    0x2
00192 #define COND_LT_MASK    0x4
00193 #define COND_IN_MASK    0x8
00194 
00195 /*
00196  * The _MASK's are used to get a the specified field after it has been
00197  * shifted by _SHIFT and then bit patterns above can be used to test
00198  * the field.  These are useful in assembly code.
00199  */
00200 #define FPU_BASE_SHIFT  21
00201 #define FPU_BASE_MASK   0x1f
00202 #define FPU_FMT_SHIFT   21
00203 #define FPU_FMT_MASK    0xf
00204 #define FPU_RT_SHIFT    16
00205 #define FPU_RT_MASK     0x1f
00206 #define FPU_RT_FPRMASK  0x1e
00207 #define FPU_RS_SHIFT    11
00208 #define FPU_RS_MASK     0x1f
00209 #define FPU_RS_FPRMASK  0x1e
00210 #define FPU_RD_SHIFT    6
00211 #define FPU_RD_MASK     0x1f
00212 #define FPU_RD_FPRMASK  0x1e
00213 
00214 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00215 /*
00216  * These functions are used to get and set the floating-point control
00217  * registers.  They are defined in the library module fp_control.s
00218  */
00219 extern unsigned int get_fpc_csr(void);
00220 extern unsigned int set_fpc_csr(unsigned int);
00221 extern unsigned int get_fpc_irr(void);
00222 extern unsigned int get_fpc_eir(void);
00223 
00224 /*
00225  * Structure and constant definisions for the floating-point control
00226  * implementation and revision register (fpc_irr).
00227  */
00228 union fpc_irr {
00229         unsigned int fi_word;
00230         struct {
00231 #ifdef _MIPSEB
00232                 unsigned reserved : 16;
00233                 unsigned implementation : 8;
00234                 unsigned revision : 8;
00235 #endif /* _MIPSEB */
00236 #ifdef _MIPSEL
00237                 unsigned revision : 8;
00238                 unsigned implementation : 8;
00239                 unsigned reserved : 16;
00240 #endif /* _MIPSEL */
00241         } fi_struct;
00242 };
00243 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00244 
00245 /*
00246  * Constants for the implementation fieid of the fpc_irr structure for the
00247  * known implementations.
00248  */
00249 #define IMPLEMENTATION_NONE     0       /* software */
00250 #define IMPLEMENTATION_R2360    1       /* board */
00251 #define IMPLEMENTATION_R2010    2       /* chip */
00252 
00253 /*
00254  * The constant IRR_IMP_MASK is to get at the implementation fieid of the
00255  * implementation and revision register.  The other constants (IRR_IMP_*)
00256  * are constants for the known implementations.
00257  */
00258 #define IRR_IMP_MASK            0x0000ff00
00259 
00260 #define IRR_IMP_NONE            0x00000000
00261 #define IRR_IMP_R2360           0x00000100
00262 #define IRR_IMP_R2010           0x00000200
00263 
00264 /*
00265  * Structure and constant definisions for the floating-point control
00266  * control and status register (fpc_csr).
00267  */
00268 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00269 union fpc_csr {
00270         unsigned int fc_word;
00271         struct {
00272 #ifdef _MIPSEB
00273                 unsigned fcc : 7;       /* only used for mips4 */
00274                 unsigned flush : 1;
00275                 unsigned condition : 1;
00276                 unsigned reserved1 : 5;
00277 
00278                 unsigned ex_unimplemented : 1;
00279                 unsigned ex_invalid : 1;
00280                 unsigned ex_divide0 : 1;
00281                 unsigned ex_overflow : 1;
00282                 unsigned ex_underflow : 1;
00283                 unsigned ex_inexact : 1;
00284 
00285                 unsigned en_invalid : 1;
00286                 unsigned en_divide0 : 1;
00287                 unsigned en_overflow : 1;
00288                 unsigned en_underflow : 1;
00289                 unsigned en_inexact : 1;
00290 
00291                 unsigned se_invalid : 1;
00292                 unsigned se_divide0 : 1;
00293                 unsigned se_overflow : 1;
00294                 unsigned se_underflow : 1;
00295                 unsigned se_inexact : 1;
00296 
00297                 unsigned rounding_mode : 2;
00298 #endif /* _MIPSEB */
00299 #ifdef _MIPSEL
00300                 unsigned rounding_mode : 2;
00301 
00302                 unsigned se_inexact : 1;
00303                 unsigned se_underflow : 1;
00304                 unsigned se_overflow : 1;
00305                 unsigned se_divide0 : 1;
00306                 unsigned se_invalid : 1;
00307 
00308                 unsigned en_inexact : 1;
00309                 unsigned en_underflow : 1;
00310                 unsigned en_overflow : 1;
00311                 unsigned en_divide0 : 1;
00312                 unsigned en_invalid : 1;
00313 
00314                 unsigned ex_inexact : 1;
00315                 unsigned ex_underflow : 1;
00316                 unsigned ex_overflow : 1;
00317                 unsigned ex_divide0 : 1;
00318                 unsigned ex_invalid : 1;
00319                 unsigned ex_unimplemented : 1;
00320 
00321                 unsigned reserved1 : 5;
00322                 unsigned condition : 1;
00323                 unsigned flush : 1;
00324                 unsigned fcc : 7;       /* only used for mips4 */
00325 #endif /* _MIPSEL */
00326         } fc_struct;
00327 };
00328 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00329 
00330 /*
00331  * Constants for the rounding_mode field of the fpc_csr
00332  */
00333 #define ROUND_TO_NEAREST        0
00334 #define ROUND_TO_ZERO           1
00335 #define ROUND_TO_PLUS_INFINITY  2
00336 #define ROUND_TO_MINUS_INFINITY 3
00337 
00338 /* Masks to get at the unimplemented exception */
00339 #define FPCSR_FLUSH_ZERO        0x01000000
00340 #define FPCSR_UNIMP             0x00020000
00341 #define FPCSR_EXCEPTIONS        0x0003f000      /* all exceptions */
00342 #define FPCSR_ENABLES           0x00000f80
00343 #define FPCSR_FLAGS             0x0000007c
00344 
00345 #ifdef _LANGUAGE_ASSEMBLY
00346 /*
00347  * Assembly register names for the floating-point control registers.
00348  */
00349 #define fpc_irr $0
00350 #define fpc_csr $31
00351 
00352 #endif /* _LANGUAGE_ASSEMBLY */
00353 
00354 #ifdef __cplusplus
00355 }
00356 #endif
00357 #endif /* __SYS_FPU_H__ */
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