Open64 (mfef90, whirl2f, and IR tools)
TAG: version-openad; SVN changeset: 916
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00001 /* 00002 00003 Copyright (C) 2000, 2001 Silicon Graphics, Inc. All Rights Reserved. 00004 00005 This program is free software; you can redistribute it and/or modify it 00006 under the terms of version 2 of the GNU General Public License as 00007 published by the Free Software Foundation. 00008 00009 This program is distributed in the hope that it would be useful, but 00010 WITHOUT ANY WARRANTY; without even the implied warranty of 00011 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 00012 00013 Further, this software is distributed without any warranty that it is 00014 free of the rightful claim of any third person regarding infringement 00015 or the like. Any license provided herein, whether implied or 00016 otherwise, applies only to this software file. Patent licenses, if 00017 any, provided herein do not apply to combinations of this program with 00018 other software, or any other product whatsoever. 00019 00020 You should have received a copy of the GNU General Public License along 00021 with this program; if not, write the Free Software Foundation, Inc., 59 00022 Temple Place - Suite 330, Boston MA 02111-1307, USA. 00023 00024 Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pky, 00025 Mountain View, CA 94043, or: 00026 00027 http://www.sgi.com 00028 00029 For further information regarding this notice, see: 00030 00031 http://oss.sgi.com/projects/GenInfo/NoticeExplan 00032 00033 */ 00034 00035 00036 #ifndef __SYS_INST_H__ 00037 #define __SYS_INST_H__ 00038 00039 /* 00040 * inst.h -- instruction format defines 00041 */ 00042 00043 00044 /* for backward compatibility */ 00045 #define bb_ma_format ma_format 00046 00047 #ifndef _MIPSEL 00048 union mips_instruction { 00049 unsigned word; 00050 unsigned char byte[4]; 00051 struct { 00052 unsigned opcode : 6; 00053 unsigned target : 26; 00054 } j_format; 00055 struct { 00056 unsigned opcode : 6; 00057 unsigned rs : 5; 00058 unsigned rt : 5; 00059 signed simmediate : 16; 00060 } i_format; 00061 struct { 00062 unsigned opcode : 6; 00063 unsigned rs : 5; 00064 unsigned rt : 5; 00065 unsigned uimmediate : 16; 00066 } u_format; 00067 struct { /* new R4K cacheop format */ 00068 unsigned opcode : 6; 00069 unsigned rs : 5; 00070 unsigned c_op : 3; 00071 unsigned cache : 2; 00072 unsigned simmediate : 16; 00073 } c_format; 00074 struct { 00075 unsigned opcode : 6; 00076 unsigned rs : 5; 00077 unsigned rt : 5; 00078 unsigned rd : 5; 00079 unsigned re : 5; 00080 unsigned func : 6; 00081 } r_format; 00082 struct { 00083 unsigned opcode : 6; 00084 unsigned : 1; 00085 unsigned fmt : 4; 00086 unsigned rt : 5; 00087 unsigned rd : 5; 00088 unsigned re : 5; 00089 unsigned func : 6; 00090 } f_format; 00091 struct { 00092 unsigned opcode : 6; 00093 unsigned fr : 5; 00094 unsigned ft : 5; 00095 unsigned fs : 5; 00096 unsigned fd : 5; 00097 unsigned func : 3; 00098 unsigned fmt : 3; 00099 } ma_format; 00100 struct { 00101 unsigned opcode : 6; 00102 unsigned rs : 5; 00103 unsigned ft : 5; 00104 unsigned fs : 5; 00105 unsigned fd : 5; 00106 unsigned func : 6; 00107 } ps_format; 00108 struct { 00109 unsigned opcode : 6; 00110 unsigned sel : 4; 00111 unsigned fmt : 1; 00112 unsigned vt : 5; 00113 unsigned vs : 5; 00114 unsigned vd : 5; 00115 unsigned func : 6; 00116 } v_format; 00117 00118 }; 00119 #endif 00120 00121 #ifdef _MIPSEL 00122 union mips_instruction { 00123 unsigned word; 00124 unsigned char byte[4]; 00125 struct { 00126 unsigned target : 26; 00127 unsigned opcode : 6; 00128 } j_format; 00129 struct { 00130 signed simmediate : 16; 00131 unsigned rt : 5; 00132 unsigned rs : 5; 00133 unsigned opcode : 6; 00134 } i_format; 00135 struct { 00136 unsigned uimmediate : 16; 00137 unsigned rt : 5; 00138 unsigned rs : 5; 00139 unsigned opcode : 6; 00140 } u_format; 00141 struct { 00142 unsigned simmediate : 16; 00143 unsigned cache : 2; 00144 unsigned c_op : 3; 00145 unsigned rs : 5; 00146 unsigned opcode : 6; 00147 } c_format; 00148 struct { 00149 unsigned func : 6; 00150 unsigned re : 5; 00151 unsigned rd : 5; 00152 unsigned rt : 5; 00153 unsigned rs : 5; 00154 unsigned opcode : 6; 00155 } r_format; 00156 struct { 00157 unsigned func : 6; 00158 unsigned re : 5; 00159 unsigned rd : 5; 00160 unsigned rt : 5; 00161 unsigned fmt : 4; 00162 unsigned : 1; 00163 unsigned opcode : 6; 00164 } f_format; 00165 struct { 00166 unsigned fmt : 3; 00167 unsigned func : 3; 00168 unsigned fd : 5; 00169 unsigned fs : 5; 00170 unsigned ft : 5; 00171 unsigned fr : 5; 00172 unsigned opcode : 6; 00173 } ma_format; 00174 struct { 00175 unsigned func : 6; 00176 unsigned fd : 5; 00177 unsigned fs : 5; 00178 unsigned ft : 5; 00179 unsigned rs : 5; 00180 unsigned opcode : 6; 00181 } ps_format; 00182 struct { 00183 unsigned func : 6; 00184 unsigned vd : 5; 00185 unsigned vs : 5; 00186 unsigned vt : 5; 00187 unsigned fmt : 1; 00188 unsigned sel : 4; 00189 unsigned opcode : 6; 00190 } v_format; 00191 }; 00192 #endif 00193 00194 /* major opcodes */ 00195 #define spec_op 0x00 00196 #define bcond_op 0x01 00197 #define j_op 0x02 00198 #define jal_op 0x03 00199 00200 #define beq_op 0x04 00201 #define bne_op 0x05 00202 #define blez_op 0x06 00203 #define bgtz_op 0x07 00204 00205 #define addi_op 0x08 00206 #define addiu_op 0x09 00207 #define slti_op 0x0A 00208 #define sltiu_op 0x0B 00209 00210 #define andi_op 0x0C 00211 #define ori_op 0x0D 00212 #define xori_op 0x0E 00213 #define lui_op 0x0F 00214 00215 #define cop0_op 0x10 00216 #define cop1_op 0x11 00217 #define cop2_op 0x12 00218 #define cop1x_op 0x13 00219 00220 #define beql_op 0x14 00221 #define bnel_op 0x15 00222 #define blezl_op 0x16 00223 #define bgtzl_op 0x17 00224 00225 #define daddi_op 0x18 00226 #define daddiu_op 0x19 00227 #define ldl_op 0x1A 00228 #define ldr_op 0x1B 00229 00230 #define lb_op 0x20 00231 #define lh_op 0x21 00232 #define lwl_op 0x22 00233 #define lw_op 0x23 00234 00235 #define lbu_op 0x24 00236 #define lhu_op 0x25 00237 #define lwr_op 0x26 00238 #define lwu_op 0x27 00239 00240 #define sb_op 0x28 00241 #define sh_op 0x29 00242 #define swl_op 0x2A 00243 #define sw_op 0x2B 00244 00245 #define sdl_op 0x2C 00246 #define sdr_op 0x2D 00247 #define swr_op 0x2E 00248 #define cache_op 0x2F 00249 00250 #define ll_op 0x30 00251 #define lwc1_op 0x31 00252 #define lwc2_op 0x32 00253 #define pref_op 0x33 00254 00255 #define lld_op 0x34 00256 #define ldc1_op 0x35 00257 #define ldc2_op 0x36 00258 #define ld_op 0x37 00259 00260 #define sc_op 0x38 00261 #define swc1_op 0x39 00262 #define swc2_op 0x3A 00263 00264 #define scd_op 0x3C 00265 #define sdc1_op 0x3D 00266 #define sdc2_op 0x3E 00267 #define sd_op 0x3F 00268 00269 /* func field of spec opcode */ 00270 #define sll_op 0x00 00271 #define movc_op 0x01 00272 #define srl_op 0x02 00273 #define sra_op 0x03 00274 00275 #define sllv_op 0x04 00276 #define srlv_op 0x06 00277 #define srav_op 0x07 00278 00279 #define jr_op 0x08 00280 #define jalr_op 0x09 00281 #define movz_op 0x0A 00282 #define movn_op 0x0B 00283 00284 #define syscall_op 0x0C 00285 #define break_op 0x0D 00286 #define spim_op 0x0E 00287 #define sync_op 0x0F 00288 00289 #define mfhi_op 0x10 00290 #define mthi_op 0x11 00291 #define mflo_op 0x12 00292 #define mtlo_op 0x13 00293 00294 #define dsllv_op 0x14 00295 #define dsrlv_op 0x16 00296 #define dsrav_op 0x17 00297 00298 #define mult_op 0x18 00299 #define multu_op 0x19 00300 #define div_op 0x1A 00301 #define divu_op 0x1B 00302 00303 #define dmult_op 0x1C 00304 #define dmultu_op 0x1D 00305 #define ddiv_op 0x1E 00306 #define ddivu_op 0x1F 00307 00308 #define add_op 0x20 00309 #define addu_op 0x21 00310 #define sub_op 0x22 00311 #define subu_op 0x23 00312 00313 #define and_op 0x24 00314 #define or_op 0x25 00315 #define xor_op 0x26 00316 #define nor_op 0x27 00317 00318 #define slt_op 0x2A 00319 #define sltu_op 0x2B 00320 00321 #define dadd_op 0x2C 00322 #define daddu_op 0x2D 00323 #define dsub_op 0x2E 00324 #define dsubu_op 0x2F 00325 00326 #define tge_op 0x30 00327 #define tgeu_op 0x31 00328 #define tlt_op 0x32 00329 #define tltu_op 0x33 00330 00331 #define teq_op 0x34 00332 #define tne_op 0x36 00333 00334 #define dsll_op 0x38 00335 #define dsrl_op 0x3A 00336 #define dsra_op 0x3B 00337 00338 #define dsll32_op 0x3C 00339 #define dsrl32_op 0x3E 00340 #define dsra32_op 0x3F 00341 00342 /* rt field of bcond opcodes */ 00343 #define bltz_op 0x00 00344 #define bgez_op 0x01 00345 #define bltzl_op 0x02 00346 #define bgezl_op 0x03 00347 00348 #define spimi_op 0x04 00349 00350 #define tgei_op 0x08 00351 #define tgeiu_op 0x09 00352 #define tlti_op 0x0A 00353 #define tltiu_op 0x0B 00354 00355 #define teqi_op 0x0C 00356 #define tnei_op 0x0E 00357 00358 #define bltzal_op 0x10 00359 #define bgezal_op 0x11 00360 #define bltzall_op 0x12 00361 #define bgezall_op 0x13 00362 00363 /* rs field of cop opcodes */ 00364 #define mfc_op 0x00 00365 #define dmfc_op 0x01 00366 #define cfc_op 0x02 00367 #define mtc_op 0x04 00368 #define dmtc_op 0x05 00369 #define ctc_op 0x06 00370 #define bc_op 0x08 00371 #define cop_op 0x10 00372 #define copm_op 0x18 00373 00374 /* func field of cop0 COI opcodes */ 00375 #define tlbr_op 0x01 00376 #define tlbwi_op 0x02 00377 #define tlbwr_op 0x06 00378 #define tlbp_op 0x08 00379 #define rfe_op 0x10 00380 #define eret_op 0x18 00381 00382 /* func field of cop0 COM opcodes */ 00383 #define tlbr1_op 0x01 00384 #define tlbw_op 0x02 00385 #define tlbp1_op 0x08 00386 #define dctr_op 0x09 00387 #define dctw_op 0x0A 00388 00389 /* fmt field of cop1 opcodes */ 00390 #define s_fmt 0 00391 #define d_fmt 1 00392 #define e_fmt 2 00393 #define q_fmt 3 00394 #define w_fmt 4 00395 #define l_fmt 5 00396 #define ps_fmt 6 00397 00398 /* func field of cop1/{s,d,w} opcodes */ 00399 #define fadd_op 0x00 00400 #define fsub_op 0x01 00401 #define fmul_op 0x02 00402 #define fdiv_op 0x03 00403 00404 #define fsqrt_op 0x04 00405 #define fabs_op 0x05 00406 #define fmov_op 0x06 00407 #define fneg_op 0x07 00408 00409 #define froundl_op 0x08 00410 #define ftruncl_op 0x09 00411 #define fceill_op 0x0a 00412 #define ffloorl_op 0x0b 00413 00414 #define fround_op 0x0c 00415 #define ftrunc_op 0x0d 00416 #define fceil_op 0x0e 00417 #define ffloor_op 0x0f 00418 00419 #define fmovc_op 0x11 00420 #define fmovz_op 0x12 00421 #define fmovn_op 0x13 00422 00423 #define frecip_op 0x15 00424 #define frsqrt_op 0x16 00425 00426 #define fcvts_op 0x20 00427 #define fcvtspl_op 0x20 00428 #define fcvtd_op 0x21 00429 #define fcvte_op 0x22 00430 00431 #define fcvtw_op 0x24 00432 #define fcvtl_op 0x25 00433 #define fcvtps_op 0x26 00434 #define fcvtspu_op 0x28 00435 #define fpll_op 0x2c 00436 #define fplu_op 0x2d 00437 #define fpul_op 0x2e 00438 #define fpuu_op 0x2f 00439 00440 #define fcmp_op 0x30 00441 00442 /* func field of cop1x opcodes */ 00443 00444 #define lwxc1_op 0x00 00445 #define ldxc1_op 0x01 00446 #define luxc1_op 0x05 00447 #define swxc1_op 0x08 00448 #define sdxc1_op 0x09 00449 #define suxc1_op 0x0d 00450 #define pfetch_op 0x0f 00451 #define alnv_ps_op 0x1c 00452 #define madd_s_op 0x20 00453 #define madd_d_op 0x21 00454 #define madd_e_op 0x22 00455 #define madd_ps_op 0x26 00456 #define msub_s_op 0x28 00457 #define msub_d_op 0x29 00458 #define msub_e_op 0x2a 00459 #define msub_ps_op 0x2e 00460 #define nmadd_s_op 0x30 00461 #define nmadd_d_op 0x31 00462 #define nmadd_e_op 0x32 00463 #define nmadd_ps_op 0x36 00464 #define nmsub_s_op 0x38 00465 #define nmsub_d_op 0x39 00466 #define nmsub_e_op 0x3a 00467 #define nmsub_ps_op 0x3e 00468 00469 /* func field of cop2 opcodes */ 00470 #define vmsgn_op 0x00 00471 #define vcmp_eq_op 0x01 00472 #define vpickf_op 0x02 00473 #define vpickt_op 0x03 00474 #define vcmp_lt_op 0x04 00475 #define vcmp_le_op 0x05 00476 #define vmin_op 0x06 00477 #define vmax_op 0x07 00478 #define vsub_op 0x0a 00479 #define vadd_op 0x0b 00480 #define vand_op 0x0c 00481 #define vxor_op 0x0d 00482 #define vor_op 0x0e 00483 #define vnor_op 0x0f 00484 #define vsll_op 0x10 00485 #define vsrl_op 0x12 00486 #define vsra_op 0x13 00487 #define valni_ob_op 0x18 00488 #define valnv_ob_op 0x19 00489 #define valni_qh_op 0x1a 00490 #define valnv_qh_op 0x1b 00491 #define vshfl_op 0x1f 00492 #define vrnd_zu_op 0x20 00493 #define vrnd_nau_op 0x21 00494 #define vrnd_neu_op 0x22 00495 #define vrnd_zs_op 0x24 00496 #define vrnd_nas_op 0x25 00497 #define vrnd_nes_op 0x26 00498 #define vmul_op 0x30 00499 #define vmuls_op 0x32 00500 #define vmula_op 0x33 00501 #define vsuba_op 0x36 00502 #define vadda_op 0x37 00503 #define vwac_op 0x3e 00504 #define vrac_op 0x3f 00505 00506 /* format field of cop2 opcodes */ 00507 #define ob_fmt 0x0 00508 #define qh_fmt 0x1 00509 00510 /* func field for mad opcodes (ma_format.func) */ 00511 #define madd_op 0x04 00512 #define msub_op 0x05 00513 #define nmadd_op 0x06 00514 #define nmsub_op 0x07 00515 00516 /* obsolete opcodes */ 00517 #define cop3_op 0x13 00518 00519 00520 #ifdef _LANGUAGE_PASCAL 00521 00522 #ifdef _MIPSEB 00523 type 00524 mips_instruction = 00525 packed record 00526 case cardinal of 00527 0: ( 00528 word: cardinal; 00529 ); 00530 1: ( 00531 byte: packed array[0..3] of 0..255; 00532 ); 00533 2: ( 00534 opcode: 0..63; 00535 target: 0..67108863; 00536 ); 00537 3: ( 00538 opcode3: 0..63; 00539 rs: 0..31; 00540 rt: 0..31; 00541 simmediate: -32768..32767; 00542 ); 00543 4: ( 00544 opcode4: 0..63; 00545 rs4: 0..63; 00546 rt4: 0..63; 00547 uimmediate: 0..65535; 00548 ); 00549 5: ( 00550 opcode5: 0..63; 00551 rs5: 0..63; 00552 rt5: 0..63; 00553 rd5: 0..63; 00554 re5: 0..63; 00555 func: 0..63; 00556 ); 00557 end {record}; 00558 #endif 00559 00560 #ifdef _MIPSEL 00561 type 00562 mips_instruction = 00563 packed record 00564 case cardinal of 00565 0: ( 00566 word: cardinal; 00567 ); 00568 1: ( 00569 byte: packed array[0..3] of 0..255; 00570 ); 00571 2: ( 00572 target: 0..67108863; 00573 opcode: 0..63; 00574 ); 00575 3: ( 00576 simmediate: -32768..32767; 00577 rt: 0..31; 00578 rs: 0..31; 00579 opcode3: 0..63; 00580 ); 00581 4: ( 00582 uimmediate: 0..65535; 00583 rt4: 0..63; 00584 rs4: 0..63; 00585 opcode4: 0..63; 00586 ); 00587 5: ( 00588 func: 0..63; 00589 re5: 0..63; 00590 rd5: 0..63; 00591 rt5: 0..63; 00592 rs5: 0..63; 00593 opcode5: 0..63; 00594 ); 00595 end {record}; 00596 #endif 00597 00598 const 00599 /* major opcodes */ 00600 spec_op = 16#00; 00601 bcond_op = 16#01; 00602 j_op = 16#02; 00603 jal_op = 16#03; 00604 00605 beq_op = 16#04; 00606 bne_op = 16#05; 00607 blez_op = 16#06; 00608 bgtz_op = 16#07; 00609 00610 addi_op = 16#08; 00611 addiu_op = 16#09; 00612 slti_op = 16#0A; 00613 sltiu_op = 16#0B; 00614 00615 andi_op = 16#0C; 00616 ori_op = 16#0D; 00617 xori_op = 16#0E; 00618 lui_op = 16#0F; 00619 00620 cop0_op = 16#10; 00621 cop1_op = 16#11; 00622 cop2_op = 16#12; 00623 cop1x_op = 16#13; 00624 00625 beql_op = 16#14; 00626 bnel_op = 16#15; 00627 blezl_op = 16#16; 00628 bgtzl_op = 16#17; 00629 00630 daddi_op = 16#18; 00631 daddiu_op = 16#19; 00632 ldl_op = 16#1A; 00633 ldr_op = 16#1B; 00634 00635 lb_op = 16#20; 00636 lh_op = 16#21; 00637 lwl_op = 16#22; 00638 lw_op = 16#23; 00639 00640 lbu_op = 16#24; 00641 lhu_op = 16#25; 00642 lwr_op = 16#26; 00643 lwu_op = 16#27; 00644 00645 sb_op = 16#28; 00646 sh_op = 16#29; 00647 swl_op = 16#2A; 00648 sw_op = 16#2B; 00649 00650 sdl_op = 16#2C; 00651 sdr_op = 16#2D; 00652 swr_op = 16#2E; 00653 cache_op = 16#2F; 00654 00655 ll_op = 16#30; 00656 lwc1_op = 16#31; 00657 lwc2_op = 16#32; 00658 pref_op = 16#33; 00659 00660 lld_op = 16#34; 00661 ldc1_op = 16#35; 00662 ldc2_op = 16#36; 00663 ld_op = 16#37; 00664 00665 sc_op = 16#38; 00666 swc1_op = 16#39; 00667 swc2_op = 16#3A; 00668 00669 scd_op = 16#3C; 00670 sdc1_op = 16#3D; 00671 sdc2_op = 16#3E; 00672 sd_op = 16#3F; 00673 00674 /* func field of spec opcode */ 00675 sll_op = 16#00; 00676 movc_op = 16#01; 00677 srl_op = 16#02; 00678 sra_op = 16#03; 00679 00680 sllv_op = 16#04; 00681 srlv_op = 16#06; 00682 srav_op = 16#07; 00683 00684 jr_op = 16#08; 00685 jalr_op = 16#09; 00686 movz_op = 16#0A; 00687 movn_op = 16#0B; 00688 00689 syscall_op = 16#0C; 00690 break_op = 16#0D; 00691 spim_op = 16#0E; 00692 sync_op = 16#0F; 00693 00694 mfhi_op = 16#10; 00695 mthi_op = 16#11; 00696 mflo_op = 16#12; 00697 mtlo_op = 16#13; 00698 00699 dsllv_op = 16#14; 00700 dsrlv_op = 16#16; 00701 dsrav_op = 16#17; 00702 00703 mult_op = 16#18; 00704 multu_op = 16#19; 00705 div_op = 16#1A; 00706 divu_op = 16#1B; 00707 00708 dmult_op = 16#1C; 00709 dmultu_op = 16#1D; 00710 ddiv_op = 16#1E; 00711 ddivu_op = 16#1F; 00712 00713 add_op = 16#20; 00714 addu_op = 16#21; 00715 sub_op = 16#22; 00716 subu_op = 16#23; 00717 00718 and_op = 16#24; 00719 or_op = 16#25; 00720 xor_op = 16#26; 00721 nor_op = 16#27; 00722 00723 slt_op = 16#2A; 00724 sltu_op = 16#2B; 00725 00726 dadd_op = 16#2C; 00727 daddu_op = 16#2D; 00728 dsub_op = 16#2E; 00729 dsubu_op = 16#2F; 00730 00731 tge_op = 16#30; 00732 tgeu_op = 16#31; 00733 tlt_op = 16#32; 00734 tltu_op = 16#33; 00735 00736 teq_op = 16#34; 00737 tne_op = 16#36; 00738 00739 dsll_op = 16#38; 00740 dsrl_op = 16#3A; 00741 dsra_op = 16#3B; 00742 00743 dsll32_op = 16#3C; 00744 dsrl32_op = 16#3E; 00745 dsra32_op = 16#3F; 00746 00747 /* rt field of bcond opcodes */ 00748 bltz_op = 16#00; 00749 bgez_op = 16#01; 00750 bltzl_op = 16#02; 00751 bgezl_op = 16#03; 00752 00753 spimi_op = 16#04; 00754 00755 tgei_op = 16#08; 00756 tgeiu_op = 16#09; 00757 tlti_op = 16#0A; 00758 tltiu_op = 16#0B; 00759 00760 teqi_op = 16#0C; 00761 tnei_op = 16#0E; 00762 00763 bltzal_op = 16#10; 00764 bgezal_op = 16#11; 00765 bltzall_op = 16#12; 00766 bgezall_op = 16#13; 00767 00768 /* rs field of cop opcodes */ 00769 mfc_op = 16#00; 00770 dmfc_op = 16#01; 00771 cfc_op = 16#02; 00772 mtc_op = 16#04; 00773 dmtc_op = 16#05; 00774 ctc_op = 16#06; 00775 bc_op = 16#08; 00776 cop_op = 16#10; 00777 copm_op = 16#18; 00778 00779 /* func field of cop0 COI opcodes */ 00780 tlbr_op = 16#1; 00781 tlbwi_op = 16#2; 00782 tlbwr_op = 16#6; 00783 tlbp_op = 16#8; 00784 rfe_op = 16#10; 00785 eret_op = 16#18; 00786 00787 /* func field of cop0 COM opcodes */ 00788 tlbr1_op = 16#1; 00789 tlbw_op = 16#2; 00790 tlbp1_op = 16#8; 00791 dctr_op = 16#9; 00792 dctw_op = 16#a; 00793 00794 /* fmt field of cop1 opcodes */ 00795 s_fmt = 0; 00796 d_fmt = 1; 00797 e_fmt = 2; 00798 q_fmt = 3; 00799 w_fmt = 4; 00800 l_fmt = 5; 00801 ps_fmt = 6; 00802 00803 /* func field of cop1/{s,d,w} opcodes */ 00804 fadd_op = 16#00; 00805 fsub_op = 16#01; 00806 fmul_op = 16#02; 00807 fdiv_op = 16#03; 00808 00809 fsqrt_op = 16#04; 00810 fabs_op = 16#05; 00811 fmov_op = 16#06; 00812 fneg_op = 16#07; 00813 00814 froundl_op = 16#08; 00815 ftruncl_op = 16#09; 00816 fceill_op = 16#0a; 00817 ffloorl_op = 16#0b; 00818 00819 fround_op = 16#0c; 00820 ftrunc_op = 16#0d; 00821 fceil_op = 16#0e; 00822 ffloor_op = 16#0f; 00823 00824 fmovc_op = 16#11; 00825 fmovz_op = 16#12; 00826 fmovn_op = 16#13; 00827 00828 frecip_op = 16#15; 00829 frsqrt_op = 16#16; 00830 00831 fcvts_op = 16#20; 00832 fcvtd_op = 16#21; 00833 fcvte_op = 16#22; 00834 00835 fcvtw_op = 16#24; 00836 fcvtl_op = 16#25; 00837 00838 fcmp_op = 16#30; 00839 00840 /* func field of cop1x opcodes */ 00841 lwxc1_op = 16#00; 00842 ldxc1_op = 16#01; 00843 swxc1_op = 16#08; 00844 sdxc1_op = 16#09; 00845 pfetch_op = 16#0F; 00846 madd_s_op = 16#20; 00847 madd_d_op = 16#21; 00848 msub_s_op = 16#28; 00849 msub_d_op = 16#29; 00850 nmadd_s_op = 16#30; 00851 nmadd_d_op = 16#31; 00852 nmsub_s_op = 16#38; 00853 nmsub_d_op = 16#39; 00854 00855 /* func field of mad opcodes */ 00856 madd_op = 16#04; 00857 msub_op = 16#05; 00858 nmadd_op = 16#06; 00859 nmsub_op = 16#07; 00860 00861 #endif /* _LANGUAGE_PASCAL */ 00862 00863 #endif /* __SYS_INST_H__ */