Open64 (mfef90, whirl2f, and IR tools)
TAG: version-openad; SVN changeset: 916
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00001 /* 00002 00003 Copyright (C) 2000, 2001 Silicon Graphics, Inc. All Rights Reserved. 00004 00005 This program is free software; you can redistribute it and/or modify it 00006 under the terms of version 2 of the GNU General Public License as 00007 published by the Free Software Foundation. 00008 00009 This program is distributed in the hope that it would be useful, but 00010 WITHOUT ANY WARRANTY; without even the implied warranty of 00011 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 00012 00013 Further, this software is distributed without any warranty that it is 00014 free of the rightful claim of any third person regarding infringement 00015 or the like. Any license provided herein, whether implied or 00016 otherwise, applies only to this software file. Patent licenses, if 00017 any, provided herein do not apply to combinations of this program with 00018 other software, or any other product whatsoever. 00019 00020 You should have received a copy of the GNU General Public License along 00021 with this program; if not, write the Free Software Foundation, Inc., 59 00022 Temple Place - Suite 330, Boston MA 02111-1307, USA. 00023 00024 Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pky, 00025 Mountain View, CA 94043, or: 00026 00027 http://www.sgi.com 00028 00029 For further information regarding this notice, see: 00030 00031 http://oss.sgi.com/projects/GenInfo/NoticeExplan 00032 00033 */ 00034 00035 00036 /* si.h 00037 ************************************ 00038 * 00039 * Description: 00040 * 00041 * Access to generated hardware specific scheduling information. The 00042 * data structures and functions declared in this file are actually 00043 * defined in files generated using targ_info/generate/si_gen.c. The 00044 * generated C file is compiled into a DSO and this header provides 00045 * access to the information contained in the DSO. 00046 * 00047 * Resource checking: 00048 * 00049 * Cycle level 00050 * 00051 * type SI_RRW 00052 * 00053 * A Resource Reservation table Word. This is the type of an 00054 * entry in a resource reservation table. The client is 00055 * responsible for keeping a resource reservation table the 00056 * containing one SI_RRW for each cycle being scheduled. This is 00057 * also the type of a single cycle resource requirement. The 00058 * following functions are provided in order to manipulate single 00059 * cycle elements of resource reservation tables and resource 00060 * requiests: 00061 * 00062 * SI_RRW SI_RRW_Initial() 00063 * Return the value of an initalized (no reserved 00064 * resources) resource reservation entry. 00065 * 00066 * SI_RRW SI_RRW_Reserve( SI_RRW table, SI_RRW request ) 00067 * Reserve the resource in <request> from <table> and 00068 * return the result. IMPORTANT: The resources might not 00069 * be available, the the result must be checked (see 00070 * immediately below). 00071 * 00072 * bool SI_RRW_Has_Overuse( SI_RRW table_entry ) 00073 * Does <table_entry> have a resource overuse? 00074 * 00075 * SI_RRW_Unreserve( SI_RRW table, SI_RRW requirement ) 00076 * Undoes what SI_RRW_Reserve does. 00077 * 00078 * Multi cycle resource requirements 00079 * 00080 * type SI_RR 00081 * 00082 * These represent a sequence of single cycle resource 00083 * requirements, one for each consecutive cycle in a schedule. 00084 * The following access functions are available: 00085 * 00086 * INT SI_RR_Length( SI_RR req ) 00087 * Return the number of consecutive cycles with SI_RRW's 00088 * in <req> 00089 * 00090 * SI_RRW SI_RR_Cycle_RRW( SI_RR req, UINT cycle ) 00091 * Return <req>'s SI_RRW for the given <cycle> 00092 * 00093 * Resource totals: 00094 * 00095 * Sometimes we need to know more about resources than just checking 00096 * for availability. In particular, during software pipelining, we 00097 * calculate the MII of the loop by counting all the resource usages 00098 * of each kind in the loop and comparing to the number available per 00099 * cycle. We'd also like to be able to print the totals in order to 00100 * inform the user of critical resource bottlenecks. The types and 00101 * functions defined in this section should be used for this purpose. 00102 * 00103 * type SI_RESOURCE_ID 00104 * 00105 * An integer type which Represents a single type of resource. 00106 * It may also be used by the client as an index into a table of 00107 * counts. The size of such a table should be the number of 00108 * differetn types of resource defined for the hardware target, a 00109 * value given by: 00110 * 00111 * INT SI_rexource_count 00112 * 00113 * The following access functions are defined for 00114 * SI_RESOURCE_IDs: 00115 * 00116 * const char* SI_RESOURCE_ID_Name( SI_RESOURCE_ID id ) 00117 * The client supplied name of the resource. 00118 * 00119 * UINT SI_RESOURCE_ID_Avail_Per_Cycle( 00120 * SI_RESOURCE_ID id 00121 * ) 00122 * How many of them are available per cycle. 00123 * 00124 * type SI_RESOURCE_TOTAL 00125 * 00126 * Represents the total number of a particular kind of resource 00127 * used over all the cycles of a resource requirement. It has 00128 * the following access functions: 00129 * 00130 * SI_RESOURCE_ID SI_RESOURCE_TOTAL_Resource_Id( 00131 * SI_RESOURCE_TOTAL* total 00132 * ) 00133 * Return the RESOURCE_ID whose usage is described by 00134 * <total>. 00135 * 00136 * UINT SI_RESOURCE_TOTAL_Total_Used( 00137 * SI_RESOURCE_TOTAL* total 00138 * ) 00139 * Return the usage count of the RESOURCE_ID whose usage 00140 * is described by <total>. 00141 * 00142 * Calculating resource relevance 00143 * 00144 * Our software pipelining pruning heuristics use a notion of 00145 * resource relevance. In order to facilitate this we provide: 00146 * 00147 * type SI_RESOURCE_ID_SET 00148 * 00149 * SI_RESOURCE_ID_SET SI_RESOURCE_ID_SET_Universe() 00150 * Universal set of resource ids. 00151 * 00152 * SI_RESOURCE_ID_SET SI_RESOURCE_ID_SET_Empty() 00153 * Empty set of resource ids. 00154 * 00155 * SI_RESOURCE_ID_SET 00156 * SI_RESOURCE_ID_SET_Intersection( SI_RESOURCE_ID_SET s0, 00157 * SI_RESOURCE_ID_SET s1 ) 00158 * 00159 * bool SI_RESOURCE_ID_SET_Intersection_Non_Empty( 00160 * SI_RESOURCE_ID_SET s0, 00161 * SI_RESOURCE_ID_SET s1 ) 00162 * 00163 * Is the intersection of <s0> and <s1> non-empty? 00164 * 00165 * bool SI_RESOURCE_ID_SET_Intersection4_Non_Empty( 00166 * SI_RESOURCE_ID_SET s0, 00167 * SI_RESOURCE_ID_SET s1, 00168 * SI_RESOURCE_ID_SET s2, 00169 * SI_RESOURCE_ID_SET s3 ) 00170 * 00171 * Is the intersection of <s0>..<s3> non-empty? 00172 * 00173 * SI_RESOURCE_ID_SET_Complement( SI_RESOURCE_ID_SET s ) 00174 * Return the complement set of <s>. 00175 * 00176 * 00177 * Skewed pipes 00178 * 00179 * Beast (and perhaps other contemplated machines features a "skewed" 00180 * pipe which allows it to issue dependent instuctions in the same 00181 * cycle. This is somewhat described in si_gen.h. The exact best way 00182 * for either a compiler or a simulator to use this information is still 00183 * somewhat open, but we provide access to the essential information: 00184 * 00185 * type ISSUE_SLOT 00186 * 00187 * Represents one of the possible issuse slots provided by the 00188 * machine. It has the following access functions: 00189 * 00190 * const char* SI_ISSUE_SLOT_Name( SI_ISSUE_SLOT* slot ) 00191 * Returns the name supplied by the si_gen client for the 00192 * <slot>. 00193 * 00194 * INT SI_ISSUE_SLOT_Skew( SI_ISSUE_SLOT* slot ) 00195 * Returns the skew associated with the <slot>. This must 00196 * be added to the operand access and result available 00197 * times. 00198 * 00199 * INT SI_ISSUE_SLOT_Avail_Per_Cycle( SI_SCHED_INFO* slot ) 00200 * How many instructions can occupy <slot> per cycle. 00201 * 00202 * Access to all the issue slots in the machine is provided by: 00203 * 00204 * INT SI_ISSUE_SLOT_Count(void) 00205 * How many issue slots does the target hardware 00206 * provide. If 0, then no issue slots were defined and 00207 * the target machine isn't "skewed" at all, i.e. don't 00208 * worry about it. 00209 * 00210 * SI_ISSUE_SLOT* SI_Ith_Issue_Slot( UINT i ) 00211 * Return the Ith issue slot in the target architecture. 00212 * Instructions sheculed in the same cycle should be 00213 * emitted in issue slot order. 00214 * 00215 * Impossible to schedule IIs 00216 * 00217 * Some opcodes just cannot be scheduled in certain IIs. For example, we 00218 * cannot schedule floating point divides on beast in IIs which are small 00219 * even multiples of 3. To represent this we provide: 00220 * 00221 * type SI_BAD_II_SET 00222 * 00223 * with the following related functions: 00224 * 00225 * const INT SI_BAD_II_SET_MAX 00226 * The largest possible bad II (for allocating 00227 * data structures indexed by II) 00228 * 00229 * SI_BAD_II_SET SI_BAD_II_SET_Union( SI_BAD_II_SET s1, 00230 * SI_BAD_II_SET s1 ) 00231 * Return the union of the given sets. 00232 * 00233 * bool SI_BAD_II_SET_MemberP( SI_BAD_II_SET s, INT i ) 00234 * Is <i> a member of <s>? 00235 * 00236 * SI_BAD_II_SET SI_BAD_II_SET_Empty() 00237 * Returns the empty bad II set. 00238 * 00239 * 00240 * TOPCODE relative information 00241 * 00242 * All the scheduing information for a particular TOPCODE is accessible 00243 * via TSI (Top Scheduling Information) functions: 00244 * 00245 * const char* TSI_Name( TOP top ) 00246 * si_gen client supplied name for <top>'s scheduling information 00247 * instruction group. 00248 * 00249 * SI_ID TSI_Id( TOP top ) 00250 * Return the SI_ID of the scheduling information associated with 00251 * <top>. See below for a description of the SI_ID type. 00252 * 00253 * INT TSI_Operand_Access_Time( TOP top, INT operand_index ) 00254 * Time <top> accesses it's <operand_index>'th operand. 00255 * 00256 * INT TSI_Result_Avail_Time( TOP top,INT result_index ) 00257 * Time <top> makes it's <result_index>'th result available. 00258 * 00259 * INT TSI_Load_Access_Time( TOP top ) 00260 * Time <top> (a load) reads it's value from memory. 00261 * 00262 * INT TSI_Last_Issue_Cycle( TOP top ) 00263 * Time <top> issues its last instruction (non-zero only 00264 * for simulated instructions). 00265 * 00266 * INT TSI_Store_Avail_Time( TOP top ) 00267 * Time <top> (a store) makes it's result available in memory. 00268 * 00269 * SS_RR TSI_Resource_Requirement( TOP top ) 00270 * Resource requirement to schedule <top>. 00271 * 00272 * SI_BAD_II_SET TSI_II_Bad_IIs( TOP top ) 00273 * Returns a set indicating impossible IIs for this resource 00274 * class. 00275 * 00276 * SI_RR TSI_II_Resource_Requirement( TOP top, UINT ii ) 00277 * A resource requirement for scheduling a <top> in a pipelined 00278 * loop with <ii> cycles. Guaranteed to have at most <ii> cycles 00279 * worth of resource requirement. This will be NULL if 00280 * ii is a member of the bad IIs set. 00281 * 00282 * const SI_RESOURCE_ID_SET* 00283 * TSI_II_Cycle_Resource_Ids_Used( SI_ID, id, INT ii ) 00284 * See SI_ID_II_Cycle_Resource_Ids_Used. 00285 * 00286 * UINT TSI_Resource_Total_Vector_Size( TOP top ) 00287 * SI_RESOURCE_TOTAL* TSI_Resource_Total_Vector( TOP top ) 00288 * A vector and its size that gives the total resource usage for 00289 * each SI_RESOURCE_ID for the given <top>. There will be one 00290 * entry for each resource class together with a count of the 00291 * number of resource it uses. 00292 * 00293 * bool TSI_Write_Write_Interlock( TOP top ) 00294 * For simulation. Do <top> instructions interlock when they 00295 * write to a register already written to but not yet available. 00296 * 00297 * Scheduling information common to a group of TOPCODEs 00298 * 00299 * Principally for software pipelining, it is necessary to deal with 00300 * scheduling information not just by opcode, but by the underlying 00301 * groups of opcodes with identical scheduling information. To faciliate 00302 * this we provide: 00303 * 00304 * TYPE SI_ID 00305 * 00306 * which is an integer type with the following additional access 00307 * functions: 00308 * 00309 * INT SI_ID_Count() 00310 * Returns the number of SI_IDs 00311 * 00312 * const SI_RESOURCE_ID_SET* 00313 * SI_ID_II_Cycle_Resource_Ids_Used( SI_ID id, INT ii ) 00314 * For the given <ii> returns a pointer to the first 00315 * element of a vector of resource id sets. This vector 00316 * is indexed by cycle relative to issue and each cycle's 00317 * set contains just the resources used by the opcodes in 00318 * the scheduling group. Used to compute common resoruce 00319 * usage for software pipelinings pruning heuristics. 00320 * Perhaps it is suprising, but we don't seem to know the 00321 * length of these directly. Rather we are always able 00322 * to derive that information from the topcode relative 00323 * TSI_II_Resource_Requirement. 00324 * 00325 ************************************ 00326 */ 00327 00328 /* $REVISION: $ 00329 */ 00330 00331 #ifndef SI_INCLUDED 00332 #define SI_INCLUDED 00333 00334 #ifdef __cplusplus 00335 extern "C" { 00336 #endif 00337 00338 #ifndef SI_RCS_ID 00339 #define SI_RCS_ID 00340 #ifdef _KEEP_RCS_ID 00341 #endif 00342 #endif 00343 00344 #include <topcode.h> 00345 00346 typedef enum topcode TOPCODE; 00347 00348 /**************************************************************************** 00349 ****************************************************************************/ 00350 00351 typedef struct { 00352 mUINT64 dw[2]; 00353 } SI_BAD_II_SET; 00354 00355 enum { SI_BAD_II_SET_MAX=127 }; 00356 00357 inline SI_BAD_II_SET SI_BAD_II_SET_Union( SI_BAD_II_SET s1, SI_BAD_II_SET s2 ) 00358 { 00359 SI_BAD_II_SET the_union; 00360 00361 the_union.dw[0] = s1.dw[0] | s2.dw[0]; 00362 the_union.dw[1] = s1.dw[1] | s2.dw[1]; 00363 00364 return the_union; 00365 } 00366 00367 inline INT SI_BAD_II_SET_MemberP( SI_BAD_II_SET s, UINT i ) 00368 { 00369 UINT bitnum = i - 1; 00370 00371 if ( bitnum > (UINT)SI_BAD_II_SET_MAX ) return 0; 00372 00373 return (s.dw[bitnum / 64] & (1ULL << (bitnum % 64))) != 0; 00374 } 00375 00376 inline SI_BAD_II_SET SI_BAD_II_SET_Empty( void ) 00377 { 00378 const SI_BAD_II_SET empty_set = {{0,0}}; 00379 00380 return empty_set; 00381 } 00382 00383 /**************************************************************************** 00384 ****************************************************************************/ 00385 00386 typedef UINT SI_RESOURCE_ID; 00387 00388 typedef const struct { 00389 const char* name; 00390 SI_RESOURCE_ID id; 00391 mUINT8 avail_per_cycle; 00392 mUINT8 word_index; 00393 mUINT8 bit_index; 00394 } SI_RESOURCE; 00395 00396 00397 inline const char* SI_RESOURCE_Name( SI_RESOURCE* res ) 00398 { 00399 return res->name; 00400 } 00401 00402 inline UINT SI_RESOURCE_Id( SI_RESOURCE* res ) 00403 { 00404 return res->id; 00405 } 00406 00407 inline UINT SI_RESOURCE_Avail_Per_Cycle( SI_RESOURCE* res ) 00408 { 00409 return res->avail_per_cycle; 00410 } 00411 00412 inline UINT SI_RESOURCE_Word_Index( SI_RESOURCE* res ) 00413 { 00414 return res->word_index; 00415 } 00416 00417 inline UINT SI_RESOURCE_Bit_Index( SI_RESOURCE* res ) 00418 { 00419 return res->bit_index; 00420 } 00421 00422 extern const INT SI_resource_count; 00423 #ifndef __CYGWIN__ 00424 #pragma weak SI_resource_count 00425 #endif 00426 extern SI_RESOURCE* const SI_resources[]; 00427 #ifndef __CYGWIN__ 00428 #pragma weak SI_resources 00429 #endif 00430 inline const char* SI_RESOURCE_ID_Name( SI_RESOURCE_ID id ) 00431 { 00432 return SI_RESOURCE_Name(SI_resources[id]); 00433 } 00434 00435 inline UINT SI_RESOURCE_ID_Avail_Per_Cycle( SI_RESOURCE_ID id ) 00436 { 00437 return SI_RESOURCE_Avail_Per_Cycle(SI_resources[id]); 00438 } 00439 00440 /**************************************************************************** 00441 ****************************************************************************/ 00442 00443 typedef mUINT64 SI_RESOURCE_ID_SET; 00444 00445 inline SI_RESOURCE_ID_SET SI_RESOURCE_ID_SET_Universe(void) 00446 { 00447 return (SI_RESOURCE_ID_SET)-1 00448 >> (sizeof(SI_RESOURCE_ID_SET) * 8 - SI_resource_count); 00449 } 00450 00451 inline SI_RESOURCE_ID_SET SI_RESOURCE_ID_SET_Empty(void) 00452 { 00453 return (SI_RESOURCE_ID_SET)0; 00454 } 00455 00456 inline SI_RESOURCE_ID_SET 00457 SI_RESOURCE_ID_SET_Intersection( SI_RESOURCE_ID_SET s0, 00458 SI_RESOURCE_ID_SET s1 ) 00459 { 00460 return s0 & s1; 00461 } 00462 00463 inline INT 00464 SI_RESOURCE_ID_SET_Intersection_Non_Empty( SI_RESOURCE_ID_SET s0, 00465 SI_RESOURCE_ID_SET s1 ) 00466 { 00467 return (s0 & s1) != (SI_RESOURCE_ID_SET)0; 00468 } 00469 00470 inline INT 00471 SI_RESOURCE_ID_SET_Intersection4_Non_Empty( SI_RESOURCE_ID_SET s0, 00472 SI_RESOURCE_ID_SET s1, 00473 SI_RESOURCE_ID_SET s2, 00474 SI_RESOURCE_ID_SET s3 ) 00475 { 00476 return (s0 & s1 & s2 & s3) != (SI_RESOURCE_ID_SET)0; 00477 } 00478 00479 inline SI_RESOURCE_ID_SET 00480 SI_RESOURCE_ID_SET_Complement( SI_RESOURCE_ID_SET s ) 00481 { 00482 return (~s) & SI_RESOURCE_ID_SET_Universe(); 00483 } 00484 00485 /**************************************************************************** 00486 ****************************************************************************/ 00487 00488 /* SI_RRW -- A resource reservation word */ 00489 typedef mUINT64 SI_RRW; 00490 00491 extern const SI_RRW SI_RRW_initializer; 00492 #ifndef __CYGWIN__ 00493 #pragma weak SI_RRW_initializer 00494 #endif 00495 00496 extern const SI_RRW SI_RRW_overuse_mask; 00497 #ifndef __CYGWIN__ 00498 #pragma weak SI_RRW_overuse_mask 00499 #endif 00500 00501 inline SI_RRW SI_RRW_Initial(void) 00502 { 00503 return SI_RRW_initializer; 00504 } 00505 00506 inline SI_RRW SI_RRW_Reserve( SI_RRW table, SI_RRW requirement ) 00507 { 00508 return table + requirement; 00509 } 00510 00511 inline SI_RRW SI_RRW_Has_Overuse( SI_RRW word_with_reservations ) 00512 { 00513 return (word_with_reservations & SI_RRW_overuse_mask) != 0; 00514 } 00515 00516 inline SI_RRW SI_RRW_Unreserve( SI_RRW table, SI_RRW requirement ) 00517 { 00518 return table - requirement; 00519 } 00520 00521 /**************************************************************************** 00522 ****************************************************************************/ 00523 00524 typedef const struct { 00525 const char* name; 00526 mINT32 skew; 00527 mINT32 avail_per_cycle; 00528 } SI_ISSUE_SLOT; 00529 00530 inline const char* SI_ISSUE_SLOT_Name( SI_ISSUE_SLOT* slot ) 00531 { 00532 return slot->name; 00533 } 00534 00535 inline INT SI_ISSUE_SLOT_Skew( SI_ISSUE_SLOT* slot ) 00536 { 00537 return slot->skew; 00538 } 00539 00540 inline INT SI_ISSUE_SLOT_Avail_Per_Cycle( SI_ISSUE_SLOT* slot ) 00541 { 00542 return slot->avail_per_cycle; 00543 } 00544 00545 extern const INT SI_issue_slot_count; 00546 #ifndef __CYGWIN__ 00547 #pragma weak SI_issue_slot_count 00548 #endif 00549 00550 extern SI_ISSUE_SLOT* const SI_issue_slots[]; 00551 #ifndef __CYGWIN__ 00552 #pragma weak SI_issue_slots 00553 #endif 00554 00555 inline INT SI_ISSUE_SLOT_Count(void) 00556 { 00557 return SI_issue_slot_count; 00558 } 00559 00560 inline SI_ISSUE_SLOT* SI_Ith_Issue_Slot( UINT i ) 00561 { 00562 return SI_issue_slots[i]; 00563 } 00564 00565 /**************************************************************************** 00566 ****************************************************************************/ 00567 00568 typedef const struct { 00569 SI_RESOURCE* resource; 00570 mINT32 total_used; 00571 } SI_RESOURCE_TOTAL; 00572 00573 inline SI_RESOURCE* 00574 SI_RESOURCE_TOTAL_Resource( SI_RESOURCE_TOTAL* pair ) 00575 { 00576 return pair->resource; 00577 } 00578 00579 inline SI_RESOURCE_ID SI_RESOURCE_TOTAL_Resource_Id( SI_RESOURCE_TOTAL* pair ) 00580 { 00581 return SI_RESOURCE_Id(SI_RESOURCE_TOTAL_Resource(pair)); 00582 } 00583 00584 inline UINT SI_RESOURCE_TOTAL_Avail_Per_Cycle(SI_RESOURCE_TOTAL* pair) 00585 { 00586 return SI_RESOURCE_Avail_Per_Cycle(SI_RESOURCE_TOTAL_Resource(pair)); 00587 } 00588 00589 inline INT SI_RESOURCE_TOTAL_Total_Used( SI_RESOURCE_TOTAL* pair ) 00590 { 00591 return pair->total_used; 00592 } 00593 00594 /**************************************************************************** 00595 ****************************************************************************/ 00596 00597 typedef const SI_RRW* SI_RR; 00598 00599 inline UINT SI_RR_Length( SI_RR req ) 00600 { 00601 return (INT) req[0]; 00602 } 00603 00604 inline SI_RRW SI_RR_Cycle_RRW( SI_RR req, UINT cycle ) 00605 { 00606 /* TODO: make this compilable with and without defs.h 00607 assert(cycle <= req[0]); 00608 */ 00609 return req[cycle+1]; 00610 } 00611 00612 /**************************************************************************** 00613 ****************************************************************************/ 00614 typedef UINT SI_ID; 00615 00616 typedef const struct { 00617 const char* name; 00618 SI_ID id; 00619 const mUINT8 *operand_access_times; 00620 const mUINT8 *result_available_times; 00621 mINT32 load_access_time; 00622 mINT32 last_issue_cycle; 00623 mINT32 store_available_time; 00624 SI_RR rr; 00625 const SI_RESOURCE_ID_SET *resources_used; 00626 mUINT32 ii_info_size; 00627 const SI_RR *ii_rr; 00628 const SI_RESOURCE_ID_SET * const *ii_resources_used; 00629 SI_BAD_II_SET bad_iis; 00630 mINT32 valid_issue_slot_count; 00631 SI_ISSUE_SLOT * const *valid_issue_slots; 00632 mINT32 resource_total_vector_size; 00633 SI_RESOURCE_TOTAL *resource_total_vector; 00634 mUINT8 write_write_interlock; 00635 } SI; 00636 00637 extern SI* const SI_top_si[]; 00638 #ifndef __CYGWIN__ 00639 #pragma weak SI_top_si 00640 #endif 00641 00642 inline const char* TSI_Name( TOP top ) 00643 { 00644 return SI_top_si[(INT) top]->name; 00645 } 00646 00647 inline SI_ID TSI_Id( TOP top ) 00648 { 00649 return SI_top_si[top]->id; 00650 } 00651 00652 inline INT 00653 TSI_Operand_Access_Time( TOP top, INT operand_index ) 00654 { 00655 return SI_top_si[(INT) top]->operand_access_times[operand_index]; 00656 } 00657 00658 inline INT 00659 TSI_Result_Available_Time( TOP top, INT result_index ) 00660 { 00661 return SI_top_si[(INT) top]->result_available_times[result_index]; 00662 } 00663 00664 inline INT 00665 TSI_Load_Access_Time( TOP top ) 00666 { 00667 return SI_top_si[(INT) top]->load_access_time; 00668 } 00669 00670 inline INT 00671 TSI_Last_Issue_Cycle( TOP top ) 00672 { 00673 return SI_top_si[(INT) top]->last_issue_cycle; 00674 } 00675 00676 inline INT 00677 TSI_Store_Available_Time( TOP top ) 00678 { 00679 return SI_top_si[(INT) top]->store_available_time; 00680 } 00681 00682 inline SI_RR TSI_Resource_Requirement( TOP top ) 00683 { 00684 return SI_top_si[(INT) top]->rr; 00685 } 00686 00687 inline SI_BAD_II_SET TSI_Bad_IIs( TOP top ) 00688 { 00689 return SI_top_si[(INT) top]->bad_iis; 00690 } 00691 00692 inline SI_RR TSI_II_Resource_Requirement( TOP top, INT ii ) 00693 { 00694 SI* const info = SI_top_si[(INT) top]; 00695 00696 if ( ii > info->ii_info_size ) return info->rr; 00697 00698 return info->ii_rr[ii - 1]; 00699 } 00700 00701 inline const SI_RESOURCE_ID_SET* 00702 TSI_II_Cycle_Resource_Ids_Used( TOP opcode, INT ii ) 00703 { 00704 SI* const info = SI_top_si[(INT)opcode]; 00705 if ( ii > info->ii_info_size ) return info->resources_used; 00706 00707 return info->ii_resources_used[ii - 1]; 00708 } 00709 00710 inline UINT TSI_Valid_Issue_Slot_Count( TOP top ) 00711 { 00712 return SI_top_si[(INT) top]->valid_issue_slot_count; 00713 } 00714 00715 inline SI_ISSUE_SLOT* TSI_Valid_Issue_Slots( TOP top, UINT i ) 00716 { 00717 return SI_top_si[(INT) top]->valid_issue_slots[i]; 00718 } 00719 00720 inline UINT TSI_Resource_Total_Vector_Size( TOP top ) 00721 { 00722 return SI_top_si[(INT) top]->resource_total_vector_size; 00723 } 00724 00725 inline SI_RESOURCE_TOTAL* TSI_Resource_Total_Vector( TOP top ) 00726 { 00727 return SI_top_si[(INT) top]->resource_total_vector; 00728 } 00729 00730 inline INT TSI_Write_Write_Interlock( TOP top ) 00731 { 00732 return SI_top_si[(INT) top]->write_write_interlock; 00733 } 00734 00735 /**************************************************************************** 00736 ****************************************************************************/ 00737 00738 extern const INT SI_ID_count; 00739 #ifndef __CYGWIN__ 00740 #pragma weak SI_ID_count 00741 #endif 00742 00743 inline INT SI_ID_Count(void) 00744 { 00745 return SI_ID_count; 00746 } 00747 00748 extern SI* const SI_ID_si[]; 00749 #ifndef __CYGWIN__ 00750 #pragma weak SI_ID_si 00751 #endif 00752 00753 inline const SI_RESOURCE_ID_SET* 00754 SI_ID_II_Cycle_Resource_Ids_Used( SI_ID id, INT ii ) 00755 { 00756 SI* const info = SI_ID_si[id]; 00757 if ( ii > info->ii_info_size ) return info->resources_used; 00758 00759 return info->ii_resources_used[ii - 1]; 00760 } 00761 00762 00763 #ifdef __cplusplus 00764 } 00765 #endif 00766 #endif