Seminars & Events

Argonne Leadership Computing Facility
"A Performance Metric of Memory Systems"

DATE: February 17, 2012 to February 17, 2012
TIME: 10:30 AM - 11:30 AM
SPEAKER: Dr. Dawei Wang, Postdoctoral Research Associate, Illinois Institute of Technology, Department of Computer Science
LOCATION: Building 240 / TCS Conference Room 1404-05, Argonne National Laboratory
HOST: Kalyan Kumaran

Description:
Due to the infamous “memory wall” problem and a drastic increase in the number of data intensive applications, memory rather than processor has become the leading performance bottleneck of modern computing systems. Evaluating and understanding memory system performance is increasingly becoming the core of high-end computing. Conventional memory metrics, such as miss ratio, average miss latency, average memory access time, etc., are designed to measure a given memory performance parameter,
and do not reflect the overall performance of a memory system. On the other hand, widely used system metrics, such as IPC and Flops are designed to measure CPU performance, and do not directly reflect memory performance. In this talk, a novel memory metric, Access Per Cycle (APC) is proposed to measure overall memory performance with consideration of the complexity of modern memory systems. A unique contribution of APC is its separation of memory evaluation from CPU evaluation; therefore, it provides a quantitative measurement of the “data-intensiveness” of an application. Simulation results show that APC is significantly more appropriate than the existing memory metrics in evaluating modern memory systems. After the introduction of APC, some previous works of the speaker’s about large-scale networks will be briefly presented. These works include large-scale network switch design considerations, computing network, and network fault tolerance.

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