Seminars & Events

Argonne Leadership Computing Facility
"Micro-Threading for Multi/Many-Cores Architectures"

DATE: March 15, 2010 to March 14, 2010
TIME: 10:30 AM - 11:30 AM
SPEAKER: Mohamed Ahmed, Research Assistant, University of Connecticut
LOCATION: Building 240 / Conference Room 4301, Argonne National Labortory

Description:
Multi-core processors are becoming omnipresent in all kinds of computing platforms. They are moving quickly from few cores to hundreds or even thousands on the same chip. Along this increase in number of cores, each core is becoming simpler in design and faster in performance. These architectural changes mandate explicit parallelism at a fine-grained level in most of the HPC algorithms’ design and implementation. Moreover, such granularity adds more pressure on the system’s memory, which makes the memory latency again one of the most challenging barriers to fully utilize multi/many-core architectures. Traditional techniques, such as data prefetching, instruction-level parallelism, and coarse-grained multi-threaded models, are having diminishing returns of performance improvement or inapplicable for many algorithms.

We are proposing the micro-threading framework as a promising solution to hide memory latency inside multi/many-core architectures. In this research, we are adding another level of parallelism utilizing some of the multi/many-cores architectural aspects, such as explicit cache management, cores interconnection network, and cores heterogeneity. We are utilizing the Cell Broadband Engine as one of the leading heterogeneous multi-core processors to implement and experiment our micro-threading framework. Our implementation and measures using micro-threads show good performance improvements in scientific algorithms, such as the FFT.

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