CACHES 2011

Overview

As we look forward to the exascale era, heterogeneous parallel machines with accelerators, such as GPUs, FPGAs, and upcoming on-chip accelerator cores, are expected to play a massive role in architecting the largest systems in the world. While there is significant interest in accelerator- based architectures, much of this interest is an artifact of the hype associated with them. However, without understanding the behavior of detailed kernels or even entire applications on these architectures, it is unclear how future systems would be designed based on these architectures.

For accelerator-based heterogeneous systems to truly be a successful High Performance Computing platform, it is important that we obtain a complete picture of HPC applications and learn the opportunities and challenges these architectures raise. This workshop aims at providing a platform where the characteristics of computational kernels and applications, and how different software stacks impact them, are presented to the research community to guide future accelerator-based HPC system designs.

The goal of this workshop is to bring together researchers and practitioners who are involved in application characterizations for heterogeneous exascale systems, to discuss their ongoing research as well as future trends in these designs.