Accelerators and Hybrid Exascale Systems (AsHES)
IPDPS 2012: IEEE International Parallel and Distributed Processing Symposium
Workshop Scope and Goals
As we look beyond the petascale era, accelerators such as Graphics Processing Units (GPUs) and FPGAs, as well as upcoming integrated hybrid processing cores, are expected to play a preeminent role in architecting the largest systems in the world. While there is significant interest in these architectures, much of this interest is an artifact of the hype associated with them. This workshop focuses on understanding the implications of accelerators on the architectures and programming environments of future systems. It seeks to ground accelerator research through studies of application kernels or whole applications on such systems, as well as tools and libraries that improve the performance or productivity of applications trying to use these systems.
The goal of this workshop is to bring together researchers and practitioners who are involved in application studies for accelerators and other hybrid systems, to learn the opportunities and challenges in future design trends for HPC applications and systems.
Journal Special Issue
The best papers of AsHES 2012 will be included in a
Dec. 7th, 2011 Extended to Dec. 19th, 2011, 11:59 pm PST
Author Notification: Jan. 30th, 2012
Camera-Ready Deadline: Feb. 19th, 2012
Workshop: May, 2012
CACHES 2011 in Tucson, Arizona
Web Chair: Gregory Diamos, NVIDIA