Current and emerging systems are deployed with heterogeneous architectures and accelerators of more than one type e.g. GPGPU, Intel® Xeon Phi™, FPGA along with hybrid processors of both lightweight and heavyweight cores (e.g APU, big.LITTLE). Such architectures also comprise of hybrid memory systems equipped with stacked/hierarchical memory and non-volatile memory in addition to regular DRAM. Programming such a system can be a real challenge along with locality, scheduling, load balancing, concurrency and so on.

This workshop focuses on understanding the implications of accelerators and heterogeneous designs on the hardware systems, porting applications, performing compiler optimizations, and developing programming environments for current and emerging systems. It seeks to ground accelerator research through studies of application kernels or whole applications on such systems, as well as tools and libraries that improve the performance and productivity of applications on these systems.

The goal of this workshop is to bring together researchers and practitioners who are involved in application studies for accelerators and other heterogeneous systems, to learn the opportunities and challenges in future design trends for HPC applications and systems.

Paper Submission: January 24th, 2018 February 9th, 2018 (EXTENDED) (AoE)

Paper Notification: February 23rd, 2018 February 26th, 2018

Camera-Ready Papers Due: March 12th, 2018

The best papers of AsHES 2018 will be invited to a Special Issue on Topics on Heterogeneous Computing of the Elsevier International Journal on Parallel Computing (PARCO) (Link to Speical Issues Lists).

ASHES 2017 in Orlando, USA

ASHES 2016 in Chicago, USA

ASHES 2015, PLC 2015 in Hyderabad, India

ASHES 2014, PLC 2014 in Phoenix, USA

ASHES 2013, PLC 2013 in Boston, USA

ASHES 2012 in Shanghai, China

CACHES 2011 in Tucson, Arizona