Memory Bottlenecks and Memory Contention in Multi-Core Monte Carlo Transport Codes

TitleMemory Bottlenecks and Memory Contention in Multi-Core Monte Carlo Transport Codes
Publication TypeConference Paper
Year of Publication2013
AuthorsTramm, JR, Siegel, AR
Conference NameJoint International Conference on Supercomputing in Nuclear Applications + Monte Carlo
Conference LocationParis
Other NumbersANL/MCS-P5056-1213
Abstract

Current and next generation processor designs require exploiting on-chip, fine-grained parallelism to achieve a significant fraction of theoretical peak CPU speed. The success or failure of these designs will have a tremendous impact on the performance and scaling of a number of key reactor physics algorithms run on next-generation computer architectures. One key example is the Monte Carlo (MC) method for neutron transport. MC methods are characterized by complex memory access patterns that heavily tax shared resources of multi-core memory hierarchies. In this analysis we study in depth the on-node scaling properties and memory contention issues of MC particle transport specifically for reactor physics calculations.

 

PDFhttp://www.mcs.anl.gov/papers/P5056-1213.pdf