|Title||Re-Form: FPGA-Powered True Codesign Flow for High-Performance Computing In The Post-Moore Era |
|Publication Type||Conference Paper |
|Year of Publication||2016 |
|Authors||Cappello, F, Yoshii, K, Finkel, H, Cong, J |
|Conference Name||The 2016 Post-Moore’s Era Supercomputing (PMES) Workshop |
|Date Published||11/2016 |
|Conference Location||Salt Lake City, Utah |
|Abstract||Multicore scaling will end soon because of practical power limits. Dark silicon is becoming a major issue even more than the end of Moore’s law. In the post-Moore era, the energy efficiency of computing will be a major concern. FPGAs could be a key to maximizing the energy efficiency. In this paper we address severe challenges in the adoption of FPGA in HPC and describe “Re-form,” an FPGA-powered codesign flow.