LANS Informal Seminar
"A Component Infrastructure for Performance and Power Modeling of Parallel Scientific Applications"
DATE: May 28, 2008
TIME: - Description:
SPEAKER: Van Bui
LOCATION: Building 221 Conference Room A261, Argonne National Laboratory
Characterizing the performance of scientific applications is essential for effective code optimization. Maximizing power efficiency is becoming increasingly important in current high-performance architectures. There is little or no hardware or software support for detailed power measurements. Hardware counter-based power models are a promising method for guiding software-based techniques for reducing power. We present a component-based infrastructure for performance and power modeling of parallel scientific applications. The power model leverages on-chip performance hardware counters and is designed to model power consumption for modern multiprocessor/multicore systems. The components that form the basis of this system includes application, performance/power measurement and analysis components. We collect performance data using the TAU performance component and apply the power model in the performance and power analysis of a parallel fluid dynamics application by using the PerfExplorer component. More specifically, we analyze the trade-offs between performance and power efficiency in the configuration of the application components, in applying individual compiler optimizations using the OpenUH compiler, and in using different parallel programming models (e.g., MPI and OpenMP).
Please send questions or suggestions to Debojyoti Ghosh: ghosh at mcs dot anl dot gov.