The Tenth International Workshop on
Accelerators and Hybrid Exascale Systems
To be held in conjunction with
34th IEEE International Parallel and Distributed Processing Symposium in New Orleans, Louisiana USA (May 18th, 2020)
Because of the acute Covid-19 situation, we will organize a virtual workshop this year.
The participation is free of charge, but requires a registration.
The workshop will take place on May 18th 2020. We will probably go 1pm Central Standard Time start. We are still working on the final program to accommodate the time zone needs of the various participants.
We ask for a registration at:
Meeting details will be announced in advance only to registered attendees.
DESCRIPTION OF THE WORKSHOP
The development of ever larger and more energy-efficient computer systems in recent years has led to more and more systems with heterogeneous computing units (CPUs, GPUs or FPGAS) and systems with heterogeneous storage systems (High Memory Bandwidth). With the rise of persistent memory, attached to the PCIe bus or to the memory DIMMs, the border between storage and memory becomes more and more fluid. Other systems offer different types of compute nodes, so that a group of nodes build the accelerator (modular supercomputing). Hierarchical storage architectures, for example using burst buffers, try to overcome the IO problems. Programming such a system can be a real challenge along with locality, scheduling, load balancing, concurrency and so on.
This workshop focuses on understanding the implications of accelerators and heterogeneous designs on the hardware systems, porting applications, performing compiler optimizations, and developing programming environments for current and emerging systems. It seeks to ground accelerator research through studies of application kernels or whole applications on such systems, as well as tools and libraries and runtime systems that improve the performance and productivity of applications on these systems.
The goal of this workshop is to bring together researchers and practitioners who are involved in application studies for accelerators and other heterogeneous systems, to learn the opportunities and challenges in future design trends for HPC applications and systems.
Important Dates (AoE)
January 20, 2020 February 7, 2020 (Friday)
Paper Notification: March 2, 2020
Camera-Ready Papers Due: March 15, 2020
Journal Special Issue
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